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<title>opensbi.git/platform/generic/thead, branch v1.8</title>
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<id>http://cgit.235523.xyz/opensbi.git/atom/platform/generic/thead?h=v1.8</id>
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<updated>2025-04-23T07:02:51Z</updated>
<entry>
<title>platform: generic: Remove platform override hooks</title>
<updated>2025-04-23T07:02:51Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-03-25T23:43:30Z</published>
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<id>urn:sha1:b80ded7756c233ebe9536b77823c51e916e43ffa</id>
<content type='text'>
Now that all of the overrides are modifying generic_platform_ops
directly, remove the unused hooks and forwarding functions. The
remaining members of struct platform_override match struct fdt_driver,
so use that type instead. This allows a future commit to reuse the
fdt_driver-based init function.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250325234342.711447-8-samuel.holland@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: Modify platform ops instead of using hooks</title>
<updated>2025-04-23T07:02:51Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-03-25T23:43:29Z</published>
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<id>urn:sha1:b353af63e2223409698a5afce7a6413204a499dd</id>
<content type='text'>
Switch all existing platform overrides to use the helper pattern instead
of the platform hooks. After this commit, only the .match_table and
.init members of struct platform_override are used.

There are two minor behavioral differences:
 - For Allwinner D1, fdt_add_cpu_idle_states() is now called before the
   body of generic_final_init(). This should have no functional impact.
 - For StarFive JH7110, if the /chosen/starfive,boot-hart-id property is
   missing, the code now falls back to using generic_coldboot_harts,
   instead of accepting any hart.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250325234342.711447-7-samuel.holland@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: Avoid casting away const</title>
<updated>2025-04-23T07:02:50Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2025-03-25T23:43:26Z</published>
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<id>urn:sha1:de777cc633bae869bb752d8b64c4b116db9594ef</id>
<content type='text'>
struct fdt_match expects match data to be const. Follow this expectation
so that no type casting is needed.

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Link: https://lore.kernel.org/r/20250325234342.711447-4-samuel.holland@sifive.com
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: add Sophgo SG2044</title>
<updated>2025-02-12T12:30:18Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@gmail.com</email>
</author>
<published>2025-01-13T07:33:12Z</published>
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<id>urn:sha1:a7f3c159a042d7d93fcd066c6c9b5d3e39f4b11f</id>
<content type='text'>
The Sophgo SG2044 is a new version of C920, although it supports
sscofpmf, it still needs this pmu quirks its cores.

Signed-off-by: Inochi Amaoto &lt;inochiama@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: sbi: pmu: fix usage of sbi_pmu_irq_bit()</title>
<updated>2025-01-30T05:00:45Z</updated>
<author>
<name>Clément Léger</name>
<email>cleger@rivosinc.com</email>
</author>
<published>2025-01-10T13:15:50Z</published>
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<id>urn:sha1:3943ddbaab00247b391128ae0a1f9258d4007f4f</id>
<content type='text'>
While sbi_pmu_irq_bit() was used to delegate irq to S-mode, LCOFIP usage
was still hardcoded in various places. This led to change the returned
value of sbi_pmu_irq_bit() to be a bit number rather than a bit mask
since it returns an 'int' and we need to obtain the bit number itself to
handle it in the IRQs handlers. Add a similar function to return the
irq mask which can also be used where the mask is required rather than
the bit itself.

Signed-off-by: Clément Léger &lt;cleger@rivosinc.com&gt;
Reviewed-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>platform: generic: Pass FDT to early/final_init overrides</title>
<updated>2024-08-24T07:32:54Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel.holland@sifive.com</email>
</author>
<published>2024-07-31T04:58:54Z</published>
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<id>urn:sha1:6e5db7b09c6c25be59900a3470923727a4e14033</id>
<content type='text'>
Several of these override functions access the FDT blob. Explicitly
indicate which callbacks are allowed to modify the FDT blob by passing
the parameter as a possibly-const pointer. This also reduces code size
by deduplicating the call to fdt_get_address().

Signed-off-by: Samuel Holland &lt;samuel.holland@sifive.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: add Sophgo CV18XX/SG200X series</title>
<updated>2024-05-16T04:48:44Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2024-05-14T04:53:40Z</published>
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<id>urn:sha1:2bed4c1c57a7775bcef534934cab5c83b45b954f</id>
<content type='text'>
The Sophgo CV18XX/SG200X series SoCs have a standard C906
core. Add support for it.

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: add Canaan Kendryte K230</title>
<updated>2024-05-09T12:40:25Z</updated>
<author>
<name>Yangyu Chen</name>
<email>cyy@cyyself.name</email>
</author>
<published>2024-04-21T15:52:09Z</published>
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<id>urn:sha1:019a8e69a1dc0c0f011fabd0372e1ba80e40dd7c</id>
<content type='text'>
Canaan Kendryte K230 SoC has T-Head C908 cores inside. The dt-binding has
been merged into the linux kernel [1]. However, it has early version of
C908 core which does not have Sscofpmf and need to use T-Head PMU
extension. Thus, we add a K230 compatible string to thead_generic_match
and set quirk for T-Head PMU.

[1] https://lore.kernel.org/linux-riscv/tencent_4D85743622F39109466913393EE2F6C5980A@qq.com/

Signed-off-by: Yangyu Chen &lt;cyy@cyyself.name&gt;
Reviewed-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: separate T-Head PMU Errata</title>
<updated>2024-05-09T12:39:05Z</updated>
<author>
<name>Yangyu Chen</name>
<email>cyy@cyyself.name</email>
</author>
<published>2024-04-21T15:52:08Z</published>
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<id>urn:sha1:33e21c9476e225064464ad045ce11cf58c2c3204</id>
<content type='text'>
As Guo Ren said from the kernel mailing list [1], future T-Head CPUs,
including the newer versions of T-Head C908, will feature standard
Sscofpmf extension. For these CPUs, T-Head's implementation of PMU
Overflow Interrupts may not needed anymore. In this case, we shouldn't
apply T-Head PMU for all T-Head CPUs. Thus, this patch separated T-Head PMU
errata.

[1] https://lore.kernel.org/linux-riscv/Zh9sUUUT09LZb0MO@gmail.com/

Signed-off-by: Yangyu Chen &lt;cyy@cyyself.name&gt;
Reviewed-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: thead: improve tlb flush errata</title>
<updated>2023-11-16T04:12:12Z</updated>
<author>
<name>Inochi Amaoto</name>
<email>inochiama@outlook.com</email>
</author>
<published>2023-10-12T01:54:18Z</published>
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<id>urn:sha1:88ae718d361aa47b4f23537d4b00cfc93b4e739e</id>
<content type='text'>
Flushing the tlb entries can solve the thead tlb problem, but flushing
it by address will miss something and lead to a exception in some rare
cases, and this is more common for sg2042.

To solve this problem, flush the tlb entries by asid in the custom trap
handler to ensure it is refreshed.

Signed-off-by: Inochi Amaoto &lt;inochiama@outlook.com&gt;
Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
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