opensbi.git/platform/generic, branch v1.2

lib: utils/irqchip: plic: Ensure no out-of-bound access in context save/restore helpers

2022-12-17T03:33:30Z

Currently the context save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

lib: utils/irqchip: plic: Ensure no out-of-bound access in priority save/restore helpers

2022-12-17T03:30:29Z

Currently the priority save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

platform: generic: Add Renesas RZ/Five initial support

2022-12-12T13:20:56Z

This commit provides basic support for the Renesas RZ/Five (R9A07G043F) SoC. The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP) 1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include: - Gigabit Ethernet 2ch - CAN interface (CAN-FD) 2ch - USB 2.0 interface 2ch - SD interface 2ch - AD converter 2ch Useful links: ------------- Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/ Signed-off-by: Lad Prabhakar Reviewed-by: Anup Patel

platform: generic: Make use of fdt_match_node()

2022-12-09T05:43:00Z

It makes sense to use fdt_match_node() instead of fdt_find_match() in fw_platform_lookup_special() as we already have the start offset to search from. Signed-off-by: Lad Prabhakar Reviewed-by: Anup Patel

platform: generic/andes: Enable generic platform support for AE350

2022-12-05T11:54:32Z

We move andes directory to platform/generic as the necessary fdt drivers are available, the users can enable the console, timer, ipi, irqchip and reset devices by adding device tree nodes stated in the docs/platform/andes-ae350.md. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Bin Meng Reviewed-by: Anup Patel

platform: generic/allwinner: Remove ghostly type cast

2022-12-04T15:08:46Z

Corrected the same parameter of writel_relaxed in sun20i_d1_riscv_cfg_init to be u32 for a while and u64 for a while. Signed-off-by: Xiang W Reviewed-by: Anup Patel

platform: generic/allwinner: Remove unused header files

2022-11-22T06:16:19Z

Remove "#include " Signed-off-by: Leizheng Zhang Reviewed-by: Bin Meng Reviewed-by: Xiang W

platform: generic: allwinner: add support for c9xx pmu

2022-10-13T04:22:09Z

With the T-HEAD C9XX cores being designed before or during ratification of the SSCOFPMF extension, they implement a PMU extension that behaves very similar but not equal to it by providing overflow interrupts though in a slightly different registers format. The sun20i-d1 is using this core. So implement the necessary overrides to allow its pmu to be used via the standard sbi-pmu extension. For now it's also the only soc using this core, so keep the additional code in the d1-space for now. Reviewed-by: Andrew Jones Reviewed-by: Guo Ren Reviewed-by: Anup Patel Signed-off-by: Heiko Stuebner

platform: generic: add extensions_init handler and platform-override

2022-10-13T04:22:06Z

Init of non-standard extensions is a platform-specific thing, so allow generic platforms to do this via a platform-override. Reviewed-by: Andrew Jones Reviewed-by: Guo Ren Reviewed-by: Anup Patel Signed-off-by: Heiko Stuebner

lib: utils/serial: add semihosting support

2022-09-13T12:54:42Z

We add RISC-V semihosting based serial console for JTAG based early debugging. The RISC-V semihosting specification is available at: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Anup Patel Signed-off-by: Kautuk Consul Reviewed-by: Anup Patel