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<title>opensbi.git/platform/qemu/virt, branch v0.7</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/platform/qemu/virt?h=v0.7</id>
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<updated>2020-03-24T08:00:32Z</updated>
<entry>
<title>lib: utils: Move fdt fixup helper routines to a different file</title>
<updated>2020-03-24T08:00:32Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-03-23T19:48:58Z</published>
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<id>urn:sha1:040e4e2ec220403fb2508aa0809052924ef63a0b</id>
<content type='text'>
FDT helper file contain both fdt fixup and parsing functions.

Split the fixup related functions to a separate file for a better code
organization.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Update to call general DT fix-up helper</title>
<updated>2020-03-18T05:39:31Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-17T14:59:51Z</published>
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<id>urn:sha1:3f8d754c2c7f2937b10013ea2866d7e7ebfee60b</id>
<content type='text'>
Platform andes/ae350, ariane-fpga, qemu/virt and sifive/fu540 codes
have been updated to call this general DT fix-up helper.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: qemu/virt: Fix up DT for reserved memory</title>
<updated>2020-03-18T04:24:07Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-17T14:59:45Z</published>
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<id>urn:sha1:c9a526877cb10e93efa26f8e5b2f7adce5ddef04</id>
<content type='text'>
This calls fdt_reserved_memory_fixup() helper in the platform's
final_init() routine.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Move PLIC DT fix up codes to fdt_helper.c</title>
<updated>2020-03-18T04:10:14Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-17T14:59:42Z</published>
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<id>urn:sha1:6af55769eb8cd5b9c7fdcd959586e0bc0fce3994</id>
<content type='text'>
Now that we have a dedicated fdt_helper.c file for DT releated
helper routines, move plic_fdt_fixup() codes from plic.c to
fdt_helper.c and rename it to fdt_plic_fixup() at the same time,
to keep name consistency in the same file.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Use one unified per-HART stack size macro for all platforms</title>
<updated>2020-03-14T03:44:00Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-13T05:39:54Z</published>
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<id>urn:sha1:72a0628c7e8063f1e6c02541cbd459eff617dd07</id>
<content type='text'>
As of today all platforms use 8KB of per-HART stack hence there is
no need for each platform to define its own macro or use the magic
number. Create one macro for all platforms. Platform still can use
its own version if needed.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Make sbi_current_hartid() as macro in riscv_asm.h</title>
<updated>2020-03-13T06:52:02Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-12T04:51:25Z</published>
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<id>urn:sha1:823345ecaed0deb7770d9bac1c881004a6410e91</id>
<content type='text'>
The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Remove disabled_hart_mask from sbi_platform</title>
<updated>2020-03-11T10:00:12Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-02T12:19:17Z</published>
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<id>urn:sha1:44ce5b99e97eb0c3695414cdb64c61f07d9a76a4</id>
<content type='text'>
The disabled_hard_mask in sbi_platform is only 64bits wide so we
cannot disable a HART with HARTID &gt; 63. To tackle this, we remove
disabled_hart_mask and replace it with hart_disabled() platform
callback.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: qemu: virt: Correct the typo in config.mk</title>
<updated>2020-02-19T11:23:42Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-02-18T10:18:33Z</published>
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<id>urn:sha1:3e7d666d7ca5eca5b4ba9c0c624a1747bbfd7bf7</id>
<content type='text'>
It should be "aligned".

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Remove stale options from config.mk files</title>
<updated>2020-02-17T12:12:55Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-02-13T11:32:41Z</published>
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<id>urn:sha1:a062200b893b6707a336750d6f914601606d13a7</id>
<content type='text'>
This patch removes stale options from config.mk files of
Ariane FPGA and QEMU virt platform support.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Support CLINT with 32bit MMIO access on RV64 system</title>
<updated>2020-01-02T03:44:36Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-12-30T06:01:59Z</published>
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<id>urn:sha1:46a90d90e7dca6eeb66700b6970171119c51fd66</id>
<content type='text'>
It is possible to have a CLINT implementation which supports
only 32bit MMIO accesses on RV64 system so this patch extends
our CLINT driver such that platform code can specify whether
CLINT supports 64bit MMIO access.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra&lt;atish.patra@wdc.com&gt;
Reviewed-by: Zong Li &lt;zong.li@sifive.com&gt;
</content>
</entry>
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