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<title>opensbi.git/platform/template, branch v0.7</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/opensbi.git/atom/platform/template?h=v0.7</id>
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<updated>2020-03-14T03:44:00Z</updated>
<entry>
<title>platform: Use one unified per-HART stack size macro for all platforms</title>
<updated>2020-03-14T03:44:00Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-13T05:39:54Z</published>
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<id>urn:sha1:72a0628c7e8063f1e6c02541cbd459eff617dd07</id>
<content type='text'>
As of today all platforms use 8KB of per-HART stack hence there is
no need for each platform to define its own macro or use the magic
number. Create one macro for all platforms. Platform still can use
its own version if needed.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Set per-HART stack size to 8KB in the template platform codes</title>
<updated>2020-03-14T03:43:20Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2020-03-13T05:39:53Z</published>
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<id>urn:sha1:2343efd0401c329187f1375114b79dd2fb102e55</id>
<content type='text'>
The template platform codes should set per-HART stack size to 8KB
to avoid possible mistakes of future platform ports.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Make sbi_current_hartid() as macro in riscv_asm.h</title>
<updated>2020-03-13T06:52:02Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-12T04:51:25Z</published>
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<id>urn:sha1:823345ecaed0deb7770d9bac1c881004a6410e91</id>
<content type='text'>
The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Remove disabled_hart_mask from sbi_platform</title>
<updated>2020-03-11T10:00:12Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-03-02T12:19:17Z</published>
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<id>urn:sha1:44ce5b99e97eb0c3695414cdb64c61f07d9a76a4</id>
<content type='text'>
The disabled_hard_mask in sbi_platform is only 64bits wide so we
cannot disable a HART with HARTID &gt; 63. To tackle this, we remove
disabled_hart_mask and replace it with hart_disabled() platform
callback.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Add an platform ops to return platform specific tlb flush limit</title>
<updated>2020-02-05T05:07:11Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2020-02-04T23:09:14Z</published>
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<id>urn:sha1:d79173b4b7519b537cf64c984d27daa26aad23c0</id>
<content type='text'>
If a platform requires to perform a tlb full flush, they should set
the tlb_range_flush_limit value to zero. However, corresponding platform
API ignore the value and continue to return the default value.

Add a platform ops to retrieve platform specific tlb range flush limit.
The platform variable becomes redundant in presence of the platform ops.
Take this opportunity to remove the variable as well.

The default is still set to smallest page size in RISC-V (4KB), as there
is no way to figure out a best value for all platforms. Individual platform
should set it to the optimal value for their platform.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: template: typo fix in system reboot/shutdown names</title>
<updated>2020-01-24T02:04:10Z</updated>
<author>
<name>Jiuyang Liu (Sequencer)</name>
<email>liujiuyang1994@gmail.com</email>
</author>
<published>2020-01-24T02:04:10Z</published>
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<id>urn:sha1:85647a1a76394ab2fe4305dfdccb439d657610c0</id>
<content type='text'>
This patch does minor typo fix in system reboot/shutdown names
in platform operations.

Signed-off-by: Jiuyang Liu (Sequencer) &lt;liujiuyang1994@gmail.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Support CLINT with 32bit MMIO access on RV64 system</title>
<updated>2020-01-02T03:44:36Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2019-12-30T06:01:59Z</published>
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<id>urn:sha1:46a90d90e7dca6eeb66700b6970171119c51fd66</id>
<content type='text'>
It is possible to have a CLINT implementation which supports
only 32bit MMIO accesses on RV64 system so this patch extends
our CLINT driver such that platform code can specify whether
CLINT supports 64bit MMIO access.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra&lt;atish.patra@wdc.com&gt;
Reviewed-by: Zong Li &lt;zong.li@sifive.com&gt;
</content>
</entry>
<entry>
<title>lib: provide a platform specific tlb range flush threshold</title>
<updated>2019-09-10T12:14:10Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-09-10T10:40:38Z</published>
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<id>urn:sha1:98ee15ca3adcf7bc22695897cd63a3ce8c5c53ff</id>
<content type='text'>
Currently, the tlb range flush threshold is fixed and set to 4k for
all platforms. However, it should be platform specific as it completely
depends upon how platform actually implements sfence instruction.

Define a platform feature that allows every individual platform to set
different values. If a platform doesn't define it, just use a page size as
the threshold.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Remove the ipi_sync method from all platforms.</title>
<updated>2019-08-16T03:12:58Z</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-08-15T01:02:15Z</published>
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<id>urn:sha1:75229705a0bf804099fbf32b61d7f6ba459226ec</id>
<content type='text'>
OpenSBI manages outstanding TLB flush requests by queueing
them in a fifo synchronously. An ipi sync which uses an
atomic operation on MMIO address is no longer required.

Remove the ipi sync method from platform header and all usage.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>include: Add version info to struct sbi_platform</title>
<updated>2019-06-29T13:56:26Z</updated>
<author>
<name>Abner Chang</name>
<email>abner.chang@hpe.com</email>
</author>
<published>2019-06-29T08:18:05Z</published>
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<id>urn:sha1:08b196956d684678e930850bc1b54d602dfff555</id>
<content type='text'>
Add version control of sbi_platform structure
- Add opensbi_version, this gives information of opensbi revision on
which the sbi_platform table was created.
- Add platform_version field in sbi_platform structure for platform
level version control.

Signed-off-by: Abner Chang &lt;abner.chang@hpe.com&gt;
Acked-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
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