opensbi.git/platform, branch v0.6

platform: qemu: virt: Correct the typo in config.mk

2020-02-19T11:23:42Z

It should be "aligned". Signed-off-by: Bin Meng Reviewed-by: Anup Patel

platform: sifive: fu540: Add 32-bit specific fdt/payload addresses

2020-02-19T11:22:07Z

For testing 32-bit SiFive specific drivers with QEMU riscv32, add 32-bit specific FW_JUMP_FDT_ADDR and FW_PAYLOAD_OFFSET. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

platform: Remove stale options from config.mk files

2020-02-17T12:12:55Z

This patch removes stale options from config.mk files of Ariane FPGA and QEMU virt platform support. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Atish Patra

platform: Add Spike initial support

2020-02-17T12:12:52Z

This patch adds initial platform support Spike emulator. Signed-off-by: James Clarke Signed-off-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Atish Patra

platform: sifive: fu540: Add platform specific 'make run' cmd

2020-02-07T10:50:34Z

This adds sifive/fu540 specific QEMU run command. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

platform: Drop qemu/sifive_u support

2020-02-07T05:31:01Z

With QEMU v4.2 RISC-V changes to improve the emulation fidelity of 'sifive_u' machine, OpenSBI v0.4 / U-Boot v2019.10 / Linux kernel v5.3 images built for the SiFive HiFive Unleashed board can be used out of the box without any special hack. Hence there is no need for us to continue supporting such a special target in OpenSBI. Going forward, sifive/fu540 platform can be used on both real hardware and QEMU 'sifive_u' machine. Signed-off-by: Bin Meng Reviewed-by: Anup Patel

platform: sifive/fu540: Set tlb range flush limit to zero

2020-02-05T05:16:29Z

It was reported that tlb range flush is not working on fu540. Only tlb full flush seems to work on fu540 probably due to some hardware errata. Set the tlb flush limit to zero so that all tlb flush requests are converted to full flush. Signed-off-by: Atish Patra Reviewed-by: Anup Patel

platform: Add an platform ops to return platform specific tlb flush limit

2020-02-05T05:07:11Z

If a platform requires to perform a tlb full flush, they should set the tlb_range_flush_limit value to zero. However, corresponding platform API ignore the value and continue to return the default value. Add a platform ops to retrieve platform specific tlb range flush limit. The platform variable becomes redundant in presence of the platform ops. Take this opportunity to remove the variable as well. The default is still set to smallest page size in RISC-V (4KB), as there is no way to figure out a best value for all platforms. Individual platform should set it to the optimal value for their platform. Signed-off-by: Atish Patra Reviewed-by: Anup Patel

platform: Update UART base addresses for qemu/sifve_u

2020-01-25T05:24:21Z

In the QEMU [1] there was a change of the UART base addresses for sifive_u machine to match the hardware. Make corresponding changes in the opensbi for qemu/sifive_u platform. [1] https://git.qemu.org/?p=qemu.git;a=commitdiff;h=4b55bc2b5f7ff065da5d2b813ee5153c598d3764 Signed-off-by: Nikita Ermakov Reviewed-by: Anup Patel

platform: template: typo fix in system reboot/shutdown names

2020-01-24T02:04:10Z

This patch does minor typo fix in system reboot/shutdown names in platform operations. Signed-off-by: Jiuyang Liu (Sequencer) Reviewed-by: Alistair Francis Signed-off-by: Anup Patel