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<title>opensbi.git/platform, branch v0.8</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2020-06-17T15:36:40Z</updated>
<entry>
<title>platform: Update Nuclei ux600 platform support</title>
<updated>2020-06-17T15:36:40Z</updated>
<author>
<name>Huaqi Fang</name>
<email>578567190@qq.com</email>
</author>
<published>2020-06-12T09:01:49Z</published>
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<id>urn:sha1:518e85cccb18a6dfe71fc8d1227c8f8d74527dc9</id>
<content type='text'>
Changes are made to support our FPGA evaluation board,
it has DDR memory(0xA0000000-0xB0000000).

* Adapt the config.mk to match FPGA evaluation board DDR memory address
* Since the RISC-V CPU core frequency of FPGA might change, so we use the
  fixed TIMER frequency to measure the real CPU core frequency.
* And the UART baudrate has to set to 57600bps for Nuclei FPGA evaluation
  board when CPU core frequency is about 8MHz, otherwise the UART input
  will not work correctly.

Signed-off-by: Huaqi Fang &lt;578567190@qq.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform/lib: Allow the OS to map the regions that are protected by PMP</title>
<updated>2020-06-15T03:55:44Z</updated>
<author>
<name>Alexandre Ghiti</name>
<email>alex@ghiti.fr</email>
</author>
<published>2020-06-13T06:59:13Z</published>
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<id>urn:sha1:6966ad0abe7077b1b5c9342f588621426d997c38</id>
<content type='text'>
This is achieved by removing the 'no-map' property from the
'reserved-memory' node when PMP is present, otherwise we keep it as it
offers a small protection if the OS does not map this region at all.
A new callback in platform_override is introduced and allows to fixup the
device-tree. It is used here to override this new default behaviour on
SiFive Fu540 platforms that has an erratum that prevents S-mode software
to access a PMP protected region using 1GB page table mapping.

If PMP is present, telling the OS not to map the reserved regions does not
add much protection since it only avoids access to regions that are already
protected by PMP. But by not allowing the OS to map those regions, it
creates holes in the OS system memory map and prevents the use of
hugepages which would generate, among other benefits, less TLB miss.

Signed-off-by: Alexandre Ghiti &lt;alex@ghiti.fr&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup.patel@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Add AE350 cache control SBIs</title>
<updated>2020-06-10T03:58:52Z</updated>
<author>
<name>Nylon Chen</name>
<email>nylon7@andestech.com</email>
</author>
<published>2020-06-09T05:56:58Z</published>
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<id>urn:sha1:32f87e5a8668445097473d4ad3ab5a0de7b1dd6f</id>
<content type='text'>
This patch contains the following AE350 specific SBIs:

- get mcache_ctl status
- get mmisc_ctl status
- set mcache_ctl status
- set mmisc_ctl status
- I-cache operation
- D-cache operation
- enable/disable L1-I-cache prefetch
- enable/disable L1-D-cache prefetch
- enable/disable non-blocking load store
- enable/disable write-around

Signed-off-by: Nylon Chen &lt;nylon7@andestech.com&gt;
Reviewed-by: Anup Patel &lt;Anup.Patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;Atish.Patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: Add AE350 platform specific SBI handler</title>
<updated>2020-06-10T03:57:46Z</updated>
<author>
<name>Nylon Chen</name>
<email>nylon7@andestech.com</email>
</author>
<published>2020-06-09T05:56:57Z</published>
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<id>urn:sha1:980290651fc28b063633a6a59b63a6938ee13cff</id>
<content type='text'>
We add AE350 platform specific SBI handler to implement
AE350 specific SBI calls.

Signed-off-by: Nylon Chen &lt;nylon7@andestech.com&gt;
Reviewed-by: Anup Patel &lt;Anup.Patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;Atish.Patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>firmware: Remove FW_PAYLOAD_FDT and related documentation</title>
<updated>2020-06-05T03:33:05Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-25T09:43:31Z</published>
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<id>urn:sha1:51f0e4a0533fe8b5d713379ab3a6cb676add82da</id>
<content type='text'>
Now that no platform is using FW_PAYLOAD_FDT mechanism, we
remove related code from Makefile and related documentation.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>platform: kendryte/k210: Use new mechanism of builtin DTB</title>
<updated>2020-06-05T03:33:02Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-06-02T05:07:15Z</published>
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<id>urn:sha1:72019ee2020fbc196a730dc4f52309e39d6b764a</id>
<content type='text'>
We update kendryte/k210 to use new mechanism of having builtin DTB
where we convert k210.dts to C source and further compile-n-link it
with libplatsbi.a.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>firmware: Allow fw_platform_init() to return updated FDT location</title>
<updated>2020-06-05T03:32:34Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-24T04:33:13Z</published>
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<id>urn:sha1:86ec5341e421b3f6ac39c75da648b7a22e56f248</id>
<content type='text'>
Currently, the fw_platform_init() does not return anything but we can
further improve by allowing fw_platform_init() to return updated FDT
location.

It is certainly not mandatory for fw_platform_init() to return a new
location of FDT (or modify FDT). In fact, the fw_platform_init() can
always return the original FDT location (i.e. 'arg1') unmodified.

This new capability of fw_platform_init() will allow platforms to:
1. Have multiple built-in FDTs and select one
2. Modify FDT before using based on platform specific straps or OTP

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Allow CLINT functions to be used for multiple CLINTs</title>
<updated>2020-05-23T05:06:43Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-12T13:08:31Z</published>
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<id>urn:sha1:a9a97511851198559e75640a9e5e67f65695dc2e</id>
<content type='text'>
We extend CLINT cold init function to have a "struct clint_data *"
parameter pointing to CLINT details. This allows platforms to use
CLINT functions for multiple CLINT instances.

When multiple CLINTs are present, the platform can also provide
one of the CLINT as reference CLINT for other CLINTs. This will
help CLINTs to sync their time value with reference CLINT using
a time_delta computed in warm init function.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Extend fdt_find_match() Implementation</title>
<updated>2020-05-23T05:06:33Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-12T08:29:52Z</published>
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<id>urn:sha1:2c685c214f2815c12f9d70422d85daa7f48003cf</id>
<content type='text'>
We extend fdt_find_match() implementation by adding node offset
parameter which represents the first node to match from.

The improved fdt_find_match() can be used to find multiple
match nodes.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils: Allow PLIC functions to be used for multiple PLICs</title>
<updated>2020-05-23T05:06:29Z</updated>
<author>
<name>Anup Patel</name>
<email>anup.patel@wdc.com</email>
</author>
<published>2020-05-12T07:27:52Z</published>
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<id>urn:sha1:446a9c6d1eb97fcedd6a94ac76d15e941a6087a8</id>
<content type='text'>
We extend all PLIC functions to have a "struct plic_data *"
parameter pointing to PLIC details. This allows platforms to
use these functions for multiple PLIC instances.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
</content>
</entry>
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