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<title>opensbi.git/platform, branch v1.1</title>
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<updated>2022-06-13T06:29:09Z</updated>
<entry>
<title>platform: Add HSM implementation for Allwinner D1</title>
<updated>2022-06-13T06:29:09Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:55Z</published>
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<id>urn:sha1:9dc5ec5c519b2ec1702e13a97b9e595ee5d94bf6</id>
<content type='text'>
Allwinner D1 contains a "PPU" power domain controller which can
automatically power down/up the CPU power domain. This power domain
includes the C906 core along with its CLINT and PLIC.

This HSM implementation supports non-retentive hart suspend by:
  1) Saving/restoring state that is lost during hart suspend,
  2) Performing cache maintenance before/after hart suspend,
  3) Configuring wakeup sources before hart suspend, and
  4) Asking the PPU to power down the hart when it enters WFI.

Since this HSM implementation is for a single-core SoC, it does not need
to worry about concurrency or saving multiple instances of state.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>lib: irqchip/plic: Factor out a context init function</title>
<updated>2022-06-13T06:24:06Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-06-13T01:03:50Z</published>
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<id>urn:sha1:8c362e7d065eaf4d55da23a190a464ba870f89aa</id>
<content type='text'>
This simplifies both the callers and the callees by removing duplicated
code and consolidating the error handling. It also fixes two bugs in the
process:
  1) ie_words was one too large when plic-&gt;num_src was a multiple of 32.
  2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA
     platforms previously only enabled one out of every 32 interrupts.

Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: add overrides for vendor extensions</title>
<updated>2022-06-13T05:47:38Z</updated>
<author>
<name>Mayuresh Chitale</name>
<email>mchitale@ventanamicro.com</email>
</author>
<published>2022-06-10T04:49:20Z</published>
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<id>urn:sha1:ce1d6188a2169c7771af1189cc8332e7a394cd19</id>
<content type='text'>
Allow the vendor_ext_check and vendor_ext_provider APIs of the
generic platform to be overridden by other platforms

Signed-off-by: Mayuresh Chitale &lt;mchitale@ventanamicro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: check if CPU node is enabled</title>
<updated>2022-05-14T04:47:33Z</updated>
<author>
<name>Jan Remes</name>
<email>jan.remes@codasip.com</email>
</author>
<published>2022-05-13T10:58:42Z</published>
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<id>urn:sha1:575bb4e8caa02d8411934c5ca47bcf87e6764133</id>
<content type='text'>
Ignore CPU nodes in FDT which are not enabled.

Signed-off-by: Jan Remes &lt;jan.remes@codasip.com&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: generic: Move Sifive platform overrides into own directory</title>
<updated>2022-05-13T03:57:23Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2022-05-13T03:57:23Z</published>
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<id>urn:sha1:9a7a677d5f7e3fbc9707683b5d07b7cb2b1aa499</id>
<content type='text'>
Let us move SiFive platform overrides for FU540 and FU740 into a separate
directory so better maintainability. Other SoC vendors can also create
their own directory under platform/generic.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>platform: generic: Generate platform override module list at compile-time</title>
<updated>2022-05-13T03:57:18Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2022-05-13T03:57:18Z</published>
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<id>urn:sha1:a3a3c60b6615ca51dbab7a5d0893e98bc89a8411</id>
<content type='text'>
Instead of having platform override module list hard-coded in the C source,
we generate it using carray.sh at compile-time.

Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>lib: utils/serial: support 'reg-offset' property</title>
<updated>2022-04-17T08:27:48Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2022-04-15T02:24:20Z</published>
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<id>urn:sha1:5c5cbb53a4fd2f7d2a7038b584f8ee01266cef04</id>
<content type='text'>
reg-offset property is used for offset to apply to the mapbase
from the start of the registers in 8250 UART. In Linux kernel,
it has been handled in 8250 UART driver.

dt-bindings:
&lt;linux&gt;/Documentation/devicetree/bindings/serial/8250.yaml

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>lib: utils/irqchip: Add FDT based driver for IMSIC</title>
<updated>2022-02-15T15:07:05Z</updated>
<author>
<name>Anup Patel</name>
<email>apatel@ventanamicro.com</email>
</author>
<published>2021-04-21T09:57:29Z</published>
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<id>urn:sha1:811da5c54180aafde6cb7740b1ccaf92d1017f24</id>
<content type='text'>
We add simple FDT irqchip driver for IMSIC so that generic platform
(and other FDT based platforms) can utilize common IMIC library.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>platform: sifive_fu740: fix reset when watchdog is running</title>
<updated>2022-01-21T16:14:57Z</updated>
<author>
<name>Aurelien Jarno</name>
<email>aurelien@aurel32.net</email>
</author>
<published>2022-01-05T07:20:39Z</published>
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<id>urn:sha1:fb688d9e9d4099d6945c9e460b9cd2c8c4d8a29b</id>
<content type='text'>
When the watchdog is running the HiFive Unmatched board does not reboot
properly and shuts down itself a few seconds after reboot, in the early
stages of the u-boot loading. On a Linux kernel this happens when the
da9063_wdt module is loaded. This does not happen if the module is
unloaded before reboot or if the watchdog module is loaded with
"stop_on_reboot=1".

Fix that by stopping the watchdog before attempting to reset the board.
This is done by zeroing the TWDSCALE field of CONTROL_D register, unless
it was already set to 0.

Reported-by: Tianon Gravi &lt;tianon@debian.org&gt;
Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Reviewed-by: Nikita Shubin &lt;n.shubin@yadro.com&gt;
Tested-by: Nikita Shubin &lt;n.shubin@yadro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>platform: sifive_fu740: do not use a global in da9063_reset/shutdown</title>
<updated>2022-01-21T16:11:33Z</updated>
<author>
<name>Aurelien Jarno</name>
<email>aurelien@aurel32.net</email>
</author>
<published>2022-01-05T07:20:38Z</published>
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<id>urn:sha1:8257262dbf4fc934c2f21a42dcd9c0f41a378d46</id>
<content type='text'>
da9063_reset() and da9063_shutdown() take the chip address in argument
(like similar functions), but in practice use the da9063 global struct
instead. Fix that.

Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Reviewed-by: Nikita Shubin &lt;n.shubin@yadro.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Xiang W &lt;wxjstz@126.com&gt;
</content>
</entry>
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