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The previous code uses _start as the load address, this default .entry is
the first segment, using _fw_start does not need to make this assumption.
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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If the device tree is at an address that is not __SIZEOF_POINTER__
aligned, the fdt relocation code tries to align both source and
destination address to __SIZEOF_POINTER__ before the memory copy.
But such alignment can lead to unexpected results if either source
or destination address is not aligned.
In fact libfdt requires that the device tree must be at an 8-byte
aligned address. Hence remove the unhelpful alignment codes.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The -N linker option is supposed to make .text writable, but GNU ld and
LLD differ in interpreting what that means. GNU ld will happily let you
have relocations in it, but LLD will see that the input section is
read-only (even though the output section is writable) and give an
error. It's unclear if either of them intend to have that behaviour in
this edge case, but regardless there's no reason not to just put the
data in a writable .data section.
Signed-off-by: Jessica Clarke <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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These are mutually exclusive. GNU as and LLVM both let later binding
directives override earlier ones so this works as intended, but LLVM 12
turned this into a warning as there's no good reason to do such a thing
and could be a potential bug. Thus, remove the redundant and incorrect
.globl directive for fw_platform_init.
Signed-off-by: Jessica Clarke <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Before entering _scratch_init(), register t3 already holds a copy
of the firmware end address, hence there is no need to calculate
it again. This reduces 3 instructions in each _scratch_init() loop.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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The "add sp, a0, zero" instruction in the trap restore path is redundant
and can be avoided if TRAP_RESTORE_xyz() assembly macros use a0 as the
base register instead of sp.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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There are two copies of the same abnormal exit code, this patch deletes one
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Enable OpenSBI to support position independent execution. Because the
position independent code will cause an additional GOT reference when
accessing the global variables, it will reduce performance a bit. Therefore,
the position independent execution is disabled by default. Users can
through specifying "FW_PIC=y" on the make command to enable this feature.
In theory, after enabling position-independent execution, the OpenSBI
can run at arbitrary address with appropriate alignment. Therefore, the
original relocation mechanism will be skipped. In other words, OpenSBI will
directly run at the load address without any code movement.
Signed-off-by: Vincent Chen <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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When OpenSBI is compiled as fPIE mode, the assembler will translate "la"
to GOT reference pattern. It will cause to cost an additional load
instruction when obtaining the symbol address. However, if the symbol
locates within the positive or negative 2GB region, we can use "lla"
instead of "la" to avoid unneeded GOT references. This patch assumes that
the OpenSBI image excluding the payload does not exceed 2GB. Based on
this assumption, all "la" instructions are replaced by "lla" to avoid
performance degradation when compiling as fPIE mode.
Signed-off-by: Vincent Chen <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We introduce sbi_trap_exit() API which can help non-firmware
(i.e. generic or platform) code to force exit trap/interrupt
handling and resume execution at context pointed by parameter
"const struct sbi_trap_regs *regs".
This new sbi_trap_exit() API will help Keystone Enclave project
to resume execution of enclave from custom SBI call handler.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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On RV32 systems, we have two CSRs for M-mode status (MSTATUS and
MSTATUSH) when H-extension is implemented. This means we have to
save/restore MSTATUSH for RV32 systems only when H-extension is
implemented. The current _trap_handler() has extra instructions
(roughly 10) for conditional save/restore of MSTATUSH CSR.
These extra instructions in RV32 _trap_handler() can be avoided
if we create separate low-level trap handler for RV32 systems
having H-extension. This patch optimizes low-level trap handler
for RV32 systems accordingly.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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The FW_PAYLOAD_FDT_PATH compile-time option is replaced by
FW_FDT_PATH compile-time option which is more flexible and
common across all OpenSBI firmwares.
This patch removes FW_PAYLOAD_FDT_PATH and updates related
documentation to use FW_FDT_PATH.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, only FW_PAYLOAD has mechanism to embed external
FDT using FW_PAYLOAD_FDT_PATH compile-time option.
This patch adds a common FW_FDT_PATH compile-time option to
embed external FDT for all OpenSBI firmwares (i.e FW_JUMP,
FW_PAYLOAD, and FW_DYNAMIC).
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, the low-level trap handler (i.e. _trap_handler()) uses
branch instructions to conditionally setup exception stack based
on which mode trap occured.
This patch implements exception stack setup using xor instructions
which is faster with same number of instructions due to lack of
branch instructions.
The new exception stack setup approach can be best described by the
following pseudocode:
Came_From_M_Mode = ((MSTATUS.MPP < PRV_M) ? 1 : 0) - 1;
Exception_Stack = TP ^ (Came_From_M_Mode & (SP ^ TP))
Came_From_M_Mode = 0 ==> Exception_Stack = TP
Came_From_M_Mode = -1 ==> Exception_Stack = SP
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, the fw_platform_init() does not return anything but we can
further improve by allowing fw_platform_init() to return updated FDT
location.
It is certainly not mandatory for fw_platform_init() to return a new
location of FDT (or modify FDT). In fact, the fw_platform_init() can
always return the original FDT location (i.e. 'arg1') unmodified.
This new capability of fw_platform_init() will allow platforms to:
1. Have multiple built-in FDTs and select one
2. Modify FDT before using based on platform specific straps or OTP
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, we are ORing FW_OPTIONS with the options passed by
previous booting stage to fw_dynamic. This causes confusion
because compiling fw_dynamic with FW_OPTIONS=0x2 does not force
enable boot prints as the U-Boot SPL passes options=0x1 in
fw_dyanmic_info.
The best thing to do is always prefer FW_OPTIONS when available.
This is intuitive for OpenSBI users and easy in debugging.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, fw_prev_arg1() is called after fw_platform_init() which
caused builtin DTB to be not available to fw_platform_init().
To allow builtin DTB available to fw_platform_init(), we should
call fw_save_info() and fw_prev_arg1() before fw_platform_init().
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Signed-off-by: Daniel Schaefer <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add optional fw_platform_init() function which will allow
platform specific code to update "struct sbi_platform platform"
before it is used.
The fw_platform_init() can be a regular C function so before
callint it we:
1. zero-out BSS section
2. Setup temporary trap handler to catch bugs
3. Setup temporary stack pointer
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Remove unnecessary CSR_MTVEC read to reduce the openSBI CSR requirement.
Mux are costly in FPGA. Allowing CSR_MTVEC to be write only is usefull
for the FMax/Area of FPGA softcore.
https://github.com/SpinalHDL/opensbi.git branch mtvec
Signed-off-by: Charles Papon <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch simplify sbi_trap_handler() API as follows:
1. Remove current hartid local variable because sbi_trap_handler()
itself does not need it.
2. Remove scratch parameter because none of the functions directly
called by sbi_trap_handler() require it.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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A platform can have discontinuous and/or sparse HART ids so we
cannot always assume a set of HARTs with continuous HART ids.
This patch adds support for discontinuous and sparse HART ids by
introducing HART index to HART id table. This table has platform
hart_count entries and it maps HART index to HART id.
The HART index to HART id table has only two restrictions:
1. HART index < sbi_platform hart_count
2. HART id < SBI_HARTMASK_MAX_BITS
Example1:
Let's say we have a platform with 2 HART ids 11 and 22, for such a
a platform:
hart_count = 2
hart_index2id[0] = 11
hart_index2id[1] = 22
Example2:
Let's say we have a platform with 5 HARTs ids 0, 1, 2, 3, and 4
but out of these HART with id 0 is not usable so for such a platform:
hart_count = 5
hart_index2id[0] = -1U
hart_index2id[1] = 1
hart_index2id[2] = 2
hart_index2id[3] = 3
hart_index2id[4] = 4
OR
hart_count = 4
hart_index2id[0] = 1
hart_index2id[1] = 2
hart_index2id[2] = 3
hart_index2id[3] = 4
With HART index to HART id table in place, the hart_disabled()
callback is now redundant so we remove it as well.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch optimizes _hartid_to_scratch() in following ways:
1. Use caller saved registers instead of callee saved registers
so that we don't need to save/restore registers on stack
2. Remove second redundant mul instruction by re-arranging
instructions
Overall, we reduce 9 instructions in _hartid_to_scratch()
implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Move the .align directives after switching the section. We want to align
the start of the current section, not the end of the previous section.
This also obsoletes the misguided workaround of disabling relaxation.
Signed-off-by: Andreas Schwab <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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It has been reported that link address range of previous booting stage
(such as U-Boot SPL) can overlap the link address rage of FW_DYNAMIC.
This means self-relocation in FW_DYNAMIC can potentially corrupt
previous booting stage if any of the secondary HART enter FW_DYNAMIC
before primary HART.
To tackle this, we add preferred boot HART field (i.e boot_hart) in
struct fw_dyanmic_info. We use this field to force secondary HARTs
into relocation wait loop till preferred/primary boot HART enters
FW_DYNAMIC completes self-relocation. If preferred boot HART is not
available then we fall back to relocation lottery approach.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Instead of forcing HART0 to do the relocation and scratch init
work, we should have an atomic lottery to decide which HART does
the relocation and scratch init.
This way any HART can be boot/main HART.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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When hypervisor extension is available, we can get traps from VS/VU
modes. We should be able to force redirect some of these traps to
HS-mode. In other words, we should be able forward traps from VS/VU
mode to HS-mode using sbi_trap_redirect() hence this patch.
Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Alistair Francis <[email protected]>
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When OpenSBI is started from an address not equal to the link address,
it is first relocated to the link address. Hart 0 performs the
relocation and notifies the other harts of its completion with the
_boot_status variable. It uses the copy of the variable relative to the
link address. This copy contains valid data only after relocation has
finished. The waiting harts will therefore read invalid data until
relocation has finished. This can cause them to continue execution too
early.
Fix this by using the _boot_status variable relative to the load address
while OpenSBI has not finished relocation.
Signed-off-by: Lukas Auer <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The boot status is currently hard-coded. Define some macros for it.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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If core-0 have finished _fdt_reloc_done but any of other cores has not
yet left the loop in _wait_relocate_copy_done, they could never leave
the loop because _boot_status is not equal to 1.
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When relocation is not required (i.e. _load_start == _link_start), we
can skip two stage wait for secondary HARTs. This means secondary HARTs
can skip the _wait_relocate_copy_done() loop and directly jump to the
_wait_for_boot_hart() loop when no relocation not required.
Signed-off-by: Anup Patel <[email protected]>
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The old code may corrupt the code of the waiting hart hence this patch
keeps waiting HART within relocation code range at time of relocation.
Signed-off-by: Xiang W <[email protected]>
Acked-by: Anup Patel <[email protected]>
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This patch extends relocation to handle overlapping load and link
addresses.
The updated relocation will work fine in most cases except when the
relocate copy loop itself falls in overlapping load and link addresses.
Signed-off-by: Xiang W <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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This patch extends fw_base to relocate to link address whenever
firmware load address is not equal to link address.
The relocation will not work when load start to load end overlap
link start to link end.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Lukas Auer <[email protected]>
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This patch extends existing firmwares (i.e. fw_jump and fw_payload)
to explicitly provide next mode and options to fw_base.
We also introduce fw_save_info() which is called by fw_base very
early on boot HART. This function can be used by existing firmwares
(i.e. fw_jump and fw_payload) to save information passed by previous
booting stage.
Overall, this is a preparatory patch for implementing fw_dynamic.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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When I tried to start opensbi with coreboot, I found that aligning to a 16-byte
boundary would make a copy error.
Corrected to align to an machine word length boundary.
Signed-off-by: Xiang Wang <[email protected]>
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Introduce "options" in "struct sbi_scratch" and firmware can update
it based on optional compile time flags before calling sbi_init().
Signed-off-by: Bin Meng <[email protected]>
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Scratch space setup needs to be done once for reboot for each
hart. _start_warm may be called several times if hart hotplug
is implemented.
Move scratch space setup to the beginning so that it is done
only once.
Signed-off-by: Atish Patra <[email protected]>
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Create a sbi_ipi_data structure that holds unpacked IPI information. At
the same time remove ipi_type from the sbi_scratch struct and use a
fixed offset to access it.
This structure fits in behind the sbi_scratch structure.
This fixes https://github.com/riscv/opensbi/issues/81
Signed-off-by: Alistair Francis <[email protected]>
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A warm reset using reset button may put icache and registers
in non-coherent state.
Flush the icache and reset all registers for every hart.
Signed-off-by: Atish Patra <[email protected]>
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All the non-boot harts run in a tight loop which may cause a heavy load
on the memory bus. This may delay the boot hart to complete the cold boot
process.
Introduce few nop that will ease up the traffic.
Signed-off-by: Atish Patra <[email protected]>
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This reverts commit 05602e2bf4812533adcb7acb1a67e43726c0e7bb.
Introducing a fence causes warm reset issue to reappear. Revert it
for the time being.
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A warm reset by pressing the reset button may not initialize all the
registers to zero. Do it for every hart during warm boot.
Signed-off-by: Atish Patra <[email protected]>
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Signed-off-by: Atish Patra <[email protected]>
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Signed-off-by: Atish Patra <[email protected]>
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Multi-core communication via memory requires the addition of a barrier
instructions to ensure cache coherency.
Signed-off-by: Xiang Wang <[email protected]>
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Writable code section can cause some security problems, so move _boot_hart_done
to the data section
Signed-off-by: Xiang Wang <[email protected]>
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This patch extends our low-level trap handler in fw_base.S for
handling M-mode to M-mode traps without overwritting stack.
Signed-off-by: Anup Patel <[email protected]>
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Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Signed-off-by: Atish Patra <[email protected]>
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Signed-off-by: Alistair Francis <[email protected]>
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