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The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).
Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because all H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) we tried till now were conservatively
flushing everything upon any HFENCE.GVMA instruction.
This patch fixes GPA passed to __sbi_hfence_gvma_vmid_gpa()
and __sbi_hfence_gvma_gpa() functions.
Fixes: 331ff6a162c1 ("lib: Support stage1 and stage2 tlb flushing")
Reported-by: Ian Huang <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Dong Du <[email protected]>
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To support different handlers for different types of resets, we are
adding a sbi_list of restart handlers.
Instead of sbi_system_reset_set_device we use
sbi_system_reset_add_device to reflect the actual meaning.
Signed-off-by: Nikita Shubin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We now have frequency of the timer device provided by the platform
support so we can emulate desired delay using a loop where the number
loop iterations are based on timer frequency.
This patch provides sbi_timer_delay_loop() for above purpose.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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Generic mdelay() and udelay() functions can be provided by the
sbi_timer framework if timer frequency is available in the timer
instance provided by the platform support or timer driver.
This patch adds timer frequency (timer_freq) member in the
struct sbi_timer_device for above purpose.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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Three macros are added. One is called BUG, which is used to put in an
unreachable branch. One is called BUG_ON, which is used to check bugs
and assert conditions are opposite. One is called SBI_ASSERT, used for
assertion checking.
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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As other exported fifo functions, we should check whether the fifo is
valid in sbi_fifo_is_empty and sbi_fifo_is_full. To this end, this patch
changes the retval from bool to int, and the two functions will return
SBI_EINVAL in the case the fifo is invalid.
Signed-off-by: Dong Du <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Clang provides a __builtin_offsetof which can be detected using
__has_builtin().
Signed-off-by: Alex Richardson <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The fields are of type unsigned long and are not pointers. While this
happens to be the same for RV32/RV64, it is not correct when compiling
for a CHERI-RISC-V system where pointers are twice the size of long.
Signed-off-by: Alex Richardson <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Avoid using a magic number, instead use a macro for the version of
struct fw_dynamic_info.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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RISC-V SBI specfication 0.3 defines a PMU extension that allows supervisor
mode to start/stop/configure pmu related events. This patch implements
all of the functionality defined in the specification.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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RISC-V SBI v0.3 specification defined a PMU extension to configure/start/stop
the hardware/firmware pmu events.
Implement PMU support in OpenSBI library. The implementation is agnostic of
event to counter mapping & mhpmevent value configuration. That means, it
expects platform hooks will be used to set up the mapping and provide
the mhpmevent value at runtime.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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A platform hook to initialize PMU allows platform vendors to provide
their own mechanism to define pmu event-counter mappings in addition
to the DT based approach.
Another platform hook that allows platform vendors customize the
final mhpmevent value configuration.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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Implement a list helper function that checks for empty lists.
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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RISC-V privilege specification allows the implementation to have less
than 64 bits.
Add a function to detect the number of implemented bits in mhpmcounter
dynamically at runtime.
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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RISC-V ISA specification v1.11 defined mcountinhibit CSR that allows
software to stop any counter from incrementing. The SBI PMU extension
depends on this CSR support in hardware.
Define mcountinhibit as a hart specific feature and detect it at runtime.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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Current, GET_F64_REG() macro does not generate correct inline
assembly for the RV32 systems. This patch provides separate
definitions of GET_F64_REG() macro for RV32 and RV64 systems.
Signed-off-by: Charles Papon <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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The parameter owner of function sbi_scratch_alloc_offset() is never used.
The scratch memory is small. We should not use it for debug information in
future. Hence eliminate the parameter.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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spin_lock_check already returned bool in the source file but not in the
header. With some toolchains that causes an error, as it should.
Because it and related functions all essentially return a bool, we can
use this opportunity to change them.
Signed-off-by: Daniel Schaefer <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Instead of having hsm_start(), hsm_stop() and hsm_suspend()
callbacks in platform operations, it will be much simpler for
HSM driver to directly register these operations as a device
to the sbi_hsm implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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Instead of having system_reset_check() and system_reset() callbacks
in platform operations, it will be much simpler for reset driver to
directly register these operations as a device to the sbi_system
implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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Instead of having ipi_send() and ipi_clear() callbacks in
platform operations, it will be much simpler for ipi driver
to directly register these operations as a device to sbi_ipi
implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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Instead of having timer_value(), timer_event_start(), and
timer_event_stop() callbacks in platform operations, it will
be much simpler for timer driver to directly register these
operations as device to the sbi_timer implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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Instead of having console_putc() and console_getc() callbacks in
platform operations, it will be much simpler for console driver to
directly register these operations as device to the sbi_console
implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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We now have sbi_domain_root_add_memregion() which allows platform
support to add root domain regions at boot-time so let's remove
the domains_root_regions() platform callback which was added
for this purpose.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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This driver is for T-HEAD test chip, fpga. It could work with
all T-HEAD riscv processors: C9xx series.
example1: (Using io-regs for reset)
reset: reset-sample {
compatible = "thead,reset-sample";
plic-delegate = <0xff 0xd81ffffc>;
entry-reg = <0xff 0xff019050>;
entry-cnt = <4>;
control-reg = <0xff 0xff015004>;
control-val = <0x1c>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
};
example2: (Using csr-regs for reset)
reset: reset-sample {
compatible = "thead,reset-sample";
plic-delegate = <0xff 0xd81ffffc>;
using-csr-reset;
csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
0x3b0 0x3b1 0x3b2 0x3b3
0x3b4 0x3b5 0x3b6 0x3b7
0x3a0>;
};
example3: (Only delegate plic enable to S-mode)
reset: reset-sample {
compatible = "thead,reset-sample";
plic-delegate = <0xff 0xd81ffffc>;
};
After this patch, all T-HEAD c9xx would use platform/generic with fw_dynamic
as default:
CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make
The platform/thead will be deprecated.
Signed-off-by: Guo Ren <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The sbi_domain_memregion_initfw() is no longer used outside
sbi_domain.c so let's make it a local function.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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We make the the root domain instance global variable so that
platform support and drivers can iterate over the root domain
regions.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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We should allow platform support to add more root memory regions
before domains are finalized. This will help platform support to
protect critical M-mode only resources.
This patch adds sbi_domain_root_add_memregion() API for above
described purpose.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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This patch adds sbi_domain_memregion_init() helper API which can
be used by platform support to initialize a domain memory region
before adding it to the root domain.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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Replace the test-and-set spinlock implementation with ticket locks
in order to get fairness (in form of FIFO order).
The implementation uses a 32-bit wide struct, which consists of
two 16-bit counters (owner and next). This is inspired by similar
spinlock implementations on other architectures.
This allows that the code works for both, RV32 and RV64.
Signed-off-by: Christoph Muellner <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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The current implementation of SPIN_LOCK_INIT() provides the spinlock
to be initialized as reference. This does not allow a direct
initialization of the spinlock object at the creation site.
Let's pass the spinlock directly instead (like Linux does as well)
and adjust all users of the macro (in fact there is only one user).
Signed-off-by: Christoph Muellner <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The __aligned(x) macro is a common wrapper around compiler's
aligned attribute, which allow to define the minimum alignement
of a data type. Let's add this macro.
Signed-off-by: Christoph Muellner <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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csr_read_allowed/csr_read_allowed requires trap.case to detect the results,
but if no exception occurs, the value of trap.case will remain unchanged,
which makes the detection results unreliable. Add code to initialize
trap.case to 0.
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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There are two copies of the same abnormal exit code, this patch deletes one
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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GCC has already a predefined macro __ASSEMBLER__ therefore, it can be
used without the need to define a new flag with -D__ASSEMBLY__.
This is useful when adding the library to projects having a build
system such one can build without the need to make changes.
THe build system does not use the Makefile in the sources tree.
Signed-off-by: Marouene Boubakri <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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Enable OpenSBI to support position independent execution. Because the
position independent code will cause an additional GOT reference when
accessing the global variables, it will reduce performance a bit. Therefore,
the position independent execution is disabled by default. Users can
through specifying "FW_PIC=y" on the make command to enable this feature.
In theory, after enabling position-independent execution, the OpenSBI
can run at arbitrary address with appropriate alignment. Therefore, the
original relocation mechanism will be skipped. In other words, OpenSBI will
directly run at the load address without any code movement.
Signed-off-by: Vincent Chen <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The SBI function IDs for RFENCE extension must match the SBI specification.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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The OpenSBI SBI implementation is now compliant with latest draft
SBI v0.3 specification so let's upgrade SBI implementation version.
This will also help HSM suspend function detection in S-mode because
HSM suspend function is only present when HSM extension is present
and SBI implementation version is 0.3 (or higher).
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch implements the SBI HSM suspend function. Using this
new SBI call, the S-mode software can put calling HART in platform
specific suspend (i.e. low-power) state. For a successful retentive
suspend, the SBI call will return without errors upon resuming
whereas for a successful non-retentive suspend, the SBI call will
resume from a user provided resume address.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add hart_suspend() callback in platform operations which will
be used by HSM implementation to enter retentive or non-retentive
suspend state.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add sbi_hart_reinit() function which will re-initialize HART CSRs
assuming HART features are already detected. This new function will
be useful in re-initializing HART after it resumes from HSM SUSPENDED
state.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch adds SBI HSM suspend related defines to ecall interface
header.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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A hart can take interrupt in the new HSM states introduced by the
SBI HSM suspend function (such as SUSPENDED state) so we rename
sbi_hsm_hart_started_mask() to something more generic such as
sbi_hsm_hart_interruptible_mask().
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We replace the use of SBI_STATE_xyz defines with SBI_HSM_STATE_xyz
defines because the HSM state defines are complete enough to implement
HSM state machine in OpenSBI. As a result of this, we can now remove
sbi_hsm_hart_state_to_status() function because it is now redundant
and sbi_hsm_hart_get_state() can directly return HSM state or error.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We simplify HSM state define names so that these defines can directly
replace SBI_HART_xyz defines used by SBI HSM implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch updates OpenSBI version to 0.9 as part of
release preparation.
Signed-off-by: Anup Patel <[email protected]>
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We don't need to pack struct sbi_platform and sbi_platform_operations
because GCC ensures member offsets match member data type irrespective
to the target system (RV32 or RV64). This also allows GCC to generate
more optimized instruction sequence when accessing members of struct
sbi_platform and struct sbi_platform_operations.
Reported-by: Paul Campbell <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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All members in struct sbi_scrach are of machine word size so no need
to pack this structure. This also allows GCC to generate more optimized
instruction sequence when accessing members of struct sbi_scratch.
Reported-by: Paul Campbell <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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All members in struct sbi_trap_regs are of machine word size so
no need to pack this structure. This also allows GCC to generate
more optimized instruction sequence when accessing members of
struct sbi_trap_regs.
Reported-by: Paul Campbell <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, the root domain memory regions are fixed in generic
code but some of the platforms may want to explicitly define
memory regions for the root domain.
This patch adds optional domains_root_regions() platform callback
which platforms can use to provide platform specific root domain
memory regions. Due to this changes, the root domain should also
undergo all sanity checks (just like regular domain) so we use
sbi_domain_register() to register root domain.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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