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Currently, OpenSBI fails to compile for LLVM=1 using 2025.11.27
riscv-gnu-toolchain with the following error:
In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:17:23: error: expected instruction format
17 | __asm__ __volatile__(".insn 0xfc000073" ::: "memory");
| ^
<inline asm>:1:8: note: instantiated into assembly here
1 | .insn 0xfc000073
| ^
In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:12:23: error: expected instruction format
12 | __asm__ __volatile__(".insn 0x30500073" ::: "memory");
| ^
<inline asm>:1:8: note: instantiated into assembly here
1 | .insn 0x30500073
| ^
2 errors generated.
To fix this compile error, use ".word" in-place ".insn".
Fixes: 1514a327306b ("lib: utils/hsm: Add SiFive TMC0 driver")
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Previously we assume only 1 UART8250 instance can be used. Now we support
multiple instances by introducing counterpart functions to putc/getc/init
which take an extra *dev parameter, and name them as uart8250_device_xyz()
The original functions without the *dev parameter will operate on the
default instance exactly the same as before, so no changes on the caller
is required.
Note: uart8250_device_init only does device initialization without the
console registration logic.
Signed-off-by: Bo Gan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add MPXY RPMI mailbox driver for performance.
Signed-off-by: Joshua Yeong <[email protected]>
Reviewed-by: Rahul Pathak <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add MPXY RPMI mailbox driver for device power.
Signed-off-by: Joshua Yeong <[email protected]>
Reviewed-by: Rahul Pathak <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add voltage service group for RPMI/MPXY support
Signed-off-by: Joshua Yeong <[email protected]>
Reviewed-by: Rahul Pathak <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The SiFive SMC0 controls the clock and power domain of the core complex
on the SiFive platform. The core complex enters the low power state
after the secondary cores enter the tile power gating and last core
execute the `CEASE` instruction with the corresponding SMC0
configurations. The devices that inside both tile power domain and core
complex power domain will be off, including caches and timer. Therefore
we need to flush the last level cache before entering the core complex
power gating and update the timer after waking up.
Reviewed-by: Cyan Yang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Nick Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Exposing the ACLINT timer update APIs so the user can update the mtimer
after waking up from the non-retentive suspend.
Reviewed-by: Cyan Yang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Nick Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The SiFive TMC0 controls the tile power domains on SiFive platform. The
CPU enters the low power state via the `CEASE` instruction after
configuring the TMC0. Any devices that inside the tile power domain will
be power gated, including the private cache. Therefore flushing the
private cache before entering the low power state.
Co-developed-by: Vincent Chen <[email protected]>
Signed-off-by: Vincent Chen <[email protected]>
Reviewed-by: Cyan Yang <[email protected]>
Signed-off-by: Nick Hu <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Since the APLIC may enter a reset state upon system wake-up from a
platform low power state, adding a restore function to reinitialize
the APLIC.
Reviewed-by: Yong-Xuan Wang <[email protected]>
Reviewed-by: Cyan Yang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Nick Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add the helpers to build up the cache hierarchy via FDT and provide some
cmo functions for the user who want to flush the entire cache.
Signed-off-by: Nick Hu <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Add the FDT cache library so we can build up the cache topology via the
'next-level-cache' DT property.
Co-developed-by: Vincent Chen <[email protected]>
Signed-off-by: Vincent Chen <[email protected]>
Co-developed-by: Andy Chiu <[email protected]>
Signed-off-by: Andy Chiu <[email protected]>
Signed-off-by: Nick Hu <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The current RISC-V CMO only defines how to flush a cache block. However,
certain use cases, such as power management, may require flushing the
entire cache. Therefore, a framework is being introduced to allow vendors
to flush the entire cache using their own methods.
Signed-off-by: Nick Hu <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The fdt_ipi_init() is already called from generic_early_init() so
let's convert IPI drivers as early drivers.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Tested-by: Nick Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The latest frozen RPMI spec has added Implementation ID
and Implementation Version as message protocol specific
mpxy attributes. Add support for these.
Signed-off-by: Rahul Pathak <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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It seems that current implementation doesn't fail on fdt_mpxy_init(),
because platforms might not have any MPXY devices. In fact, if there are
no MPXY devices, fdt_driver_init_all() will return SBI_OK.
More importantly, if there is any MPXY device which fails the
initialization, OpenSBI must check the error code and stop the booting.
Thus, this commit adds the return value for fdt_mpxy_init().
Signed-off-by: Alvin Chang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The discovery of P2A doorbell system MSI index is now through RPMI
shared memory DT node so remove p2a_db_index from RPMI system MSI
attributes and access it as a mailbox channel attribute.
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The P2A doorbell system MSI index is expected to be discovered from
device tree instead of RPMI system MSI service group attribute. This
is based on ARC feedback before RPMI spec was frozen.
Let's parse P2A doorbell system MSI index from device tree and also
expose it as rpmi channel attribute to RPMI client drivers.
Signed-off-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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Set the scratch allocation alignment to cacheline size specified by
riscv,cbom-block-size in the DTS file to avoid two atomic variables
from the same cache line causing livelock on some platforms. If the
cacheline is not specified, we set it a default value.
Signed-off-by: Raj Vishwanathan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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This function has been obsoleted by the fdt_driver library and is no
longer used.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The PXA variant of the uart8250 adds the UART Unit Enable bit (UUE) that
needs to be set to enable the XScale PXA UART. And it is required for
some RISC-V SoCs like the Spacemit K1 that implement the PXA UART.
This introduces the "intel,xscale-uart" compatible to handle setting the
UUE bit.
Signed-off-by: Junhui Liu <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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This reduces .bss size by 8 KiB, and should reduce overall memory usage
since most platforms will have significantly fewer than 512 entries in
this table. At the same time, it removes the fixed table size limit.
Since the table is only used within fdt_pmu.c, instead of updating the
extern declaration, make the table local to this file.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The supervisor software can directly receive most of the system MSIs
except P2A doorbell and MSIs preferred to be handled in M-mode.
Add MPXY RPMI mailbox client driver for the System MSI service group.
Signed-off-by: Anup Patel <[email protected]>
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The service group ID assignment and some of the BASE services have
changes in the latest RPMI specification so let's update the RPMI
implementation accordingly.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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Use the RPMI mailbox channel attributes to populate MPXY channel
attributes instead of hard coding them.
Signed-off-by: Anup Patel <[email protected]>
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To allow clients query service group version of a RPMI mailbox channel,
implement get_attribute() callback for the RPMI shared memory mailbox
controller.
Signed-off-by: Anup Patel <[email protected]>
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The rpmi_mailbox.h uses structures defined in mailbox.h so let's
include mailbox.h in rpmi_mailbox.h header.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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Currently, the common MPXY RPMI mailbox client does not support
notifications so no need for dummy notifications support.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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Some of the RPMI service groups may need additional context and
special handling when transferring messages via underlying mailbox
channel so introduce optional MPXY RPMI service group operations
for this purpose.
Signed-off-by: Anup Patel <[email protected]>
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Instead of having one common FDT MPXY RPMI mailbox client drivers
for various RPMI service groups, split this driver into two parts:
1) Common MPXY RPMI mailbox client library
2) MPXY driver for RPMI clock service group
The above split enables having a separate MPXY driver for each
RPMI clock service group and #1 (above) will allow code sharing
between various MPXY RPMI drivers.
Signed-off-by: Anup Patel <[email protected]>
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For driver subsystems that are not tightly integrated into the OpenSBI
init sequence, it is not important that the drivers are initialized in
any particular order. By putting all of these drivers in one array, they
can all be initialized with a single pass through the devicetree. This
saves about 10 ms of boot time on HiFive Unmatched.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Now that all drivers are using the fdt_driver functions for
initialization, this function is unused and can be removed.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The irqchip driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_irqchip_init() performs a
best-effort initialization of all matching DT nodes.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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s/hard_id/hartid/
Signed-off-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Currently, the same irqchip instance is registered for multiple PLIC
and APLIC instances which causes the sbi_list_for_each_entry() loop
in the sbi_irqchip_init() to hang at boot-time.
To address the above issue, register a separate irqchip instance for
each PLIC and APLIC instance.
Fixes: 2dd6eaf68055 ("lib: sbi_irqchip: Call driver warm_init from SBI core")
Reported-by: Himanshu Chauhan <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Himanshu Chauhan <[email protected]>
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This is needed for a future patches to enable the new C23 language dialect.
Signed-off-by: Michael Neuling <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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These drivers were merged on an experimental basis without the RPMI
specification being frozen. As a result, they may not be compatible with
the frozen version of the RPMI protocol. Additionally, their devicetree
bindings have not been reviewed and are subject to change. Warn the user
that these drivers make no compatibility guarantees, and that their
behavior and devicetree bindings may change incompatibly in future
versions of OpenSBI.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add a generic RPMI mailbox client driver which provides a MPXY channel.
Initially, this driver only supports RPMI clock service group but can
be extended to support multiple RPMI service groups.
Signed-off-by: Rahul Pathak <[email protected]>
Co-developed-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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The generic platform can have multiple MPXY drivers so add a simple
FDT based MPXY driver framework.
Signed-off-by: Anup Patel <[email protected]>
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Add RPMI based driver for CPPC register read, write and probe.
Signed-off-by: Subrahmanya Lingappa <[email protected]>
Co-developed-by: Rahul Pathak <[email protected]>
Signed-off-by: Rahul Pathak <[email protected]>
Co-developed-by: Sunil V L <[email protected]>
Signed-off-by: Sunil V L <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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The generic platform can have multiple CPPC drivers so add a simple
FDT based CPPC driver framework.
Signed-off-by: Anup Patel <[email protected]>
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The RPMI HSM service group provides set of routine to query and control
power states of a Hart. Add RPMI based Hart State Management (HSM) driver.
Signed-off-by: Subrahmanya Lingappa <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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The generic platform can have multiple HSM drivers so add a simple
FDT based HSM driver framework.
Signed-off-by: Anup Patel <[email protected]>
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It should possible to fixup FDT from any part of OpenSBI so add
fdt_register_general_fixup() which allows dynamic registration of
FDT fixup callbacks.
Signed-off-by: Anup Patel <[email protected]>
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Add RPMI based system suspend driver.
To test this, execute the follwoing in Linux:
$ echo mem > /sys/power/state
To wake up, execute the following command on qemu monitor terminal:
(qemu) system_wakeup
Signed-off-by: Subrahmanya Lingappa <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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The generic platform can have multiple system suspend drivers so add a
simple FDT based system suspend driver framework.
Signed-off-by: Anup Patel <[email protected]>
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Add RPMI based driver for system reset and enable it in the generic
platform defconfig
Signed-off-by: Rahul Pathak <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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The RISC-V Platform Management Interface (RPMI) defines a messaging protocol
and shared memory based transport for bi-directional communication with an
on-chip or external microcontroller.
To support RPMI in OpenSBI, add:
1) The RPMI messaging protocol defines and helper macros
2) A FDT mailbox driver for the RPMI shared memory transport
Signed-off-by: Rahul Pathak <[email protected]>
Co-developed-by: Subrahmanya Lingappa <[email protected]>
Signed-off-by: Subrahmanya Lingappa <[email protected]>
Co-developed-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
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Add a simple FDT based mailbox framework which is built on top of the generic
mailbox library. The phandle of FDT mailbox DT node is treated as the unique
mailbox controller ID which is required by the generic mailbox library. The
FDT based mailbox drivers will be probed on-demand from fdt_mailbox_request_chan()
called by the mailbox client drivers.
Signed-off-by: Anup Patel <[email protected]>
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Add generic mailbox library which is independent of hardware description
format. The OpenSBI platform support or mailbox drivers can register
mailbox controller instances which can be discovered and used by different
mailbox client drivers. Each mailbox controller instance has a unique ID
which can be used by mailbox client drivers for find the mailbox controller
instance. The mailbox client drivers will typically request a mailbox channel
from the mailbox controller and use it to do data transfer with the remote
end of mailbox channel.
Signed-off-by: Anup Patel <[email protected]>
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The timer driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_timer_init() performs a
best-effort initialization of all matching DT nodes.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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