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Since past few years, we have been using "hart features" in OpenSBI
to represent all optionalities and multi-letter extensions defined
by the RISC-V specifications.
The RISC-V profiles specification has taken a different approach and
started assigning extension names for all optionalities which did not
have any extension name previously.
(Refer, https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc)
Inspired from the RISC-V profiles specification, we convert OpenSBI
hart features into hart extensions. Going forward, we align the
extension naming with RISC-V profiles specification. Currently, only
"time CSR" and "AIA CSR" have not been assigned extension name but
for everything else we have a name.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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If a hart implements privileged spec v1.12 (or higher) then we can
safely assume that menvcfg CSR is present and we don't need MENVCFG
as a hart feature.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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If a hart implements privileged spec v1.11 (or higher) then we can
safely assume that mcountinhibit CSR is present and we don't need
MCOUNTINHIBT as a hart feature.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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If a hart implements privileged spec v1.10 (or higher) then we can
safely assume that [m|s]counteren CSR are present and we don't need
MCOUNTEREN and SCOUNTEREN as hart features.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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It is possible to guess privileged spec versions based on the CSRs
that where introduced in different privileged spec versions. In
future, if we are not able guess privileged spec version then we
can have platform provide it.
We add privileged spec version as per-hart feature and try to guess
it based on presence of mcounteren, mcountinhibit, and menvcfg CSRs.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Increase maximum number of PMU hardware events that can be mapped
by OpenSBI to 256
Signed-off-by: Jun Liang Tan <[email protected]>
Signed-off-by: Wei Liang Lim <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Recently, Sstc extension was ratified. It defines stimecmp which allows
the supervisor mode to directly update the timecmp value without the
need of the SBI call. The hardware also can inject the S-mode timer
interrupt direclty to the supervisor without going through the M-mode.
To maintain backward compatibility with the older software, SBI call
now uses stimecmp directly if the hardware supports.
Implement the Sstc extension.
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Accordind to the RISC-V privileged specification, the VS filed is
mstatus[10:9] instead of mstatus[24:23]. Modify the MSTATUS_VS
to the correct value.
Reported-by: I-Cheng Cheng <[email protected]>
Signed-off-by: Vincent Chen <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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reg-offset property is used for offset to apply to the mapbase
from the start of the registers in 8250 UART. In Linux kernel,
it has been handled in 8250 UART driver.
dt-bindings:
<linux>/Documentation/devicetree/bindings/serial/8250.yaml
Signed-off-by: Zong Li <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Extend HART feature detection to discover Smstateen CSRs at boot-time
and configure mstateen envcfg bit depending on availability of
menvcfg CSR.
Signed-off-by: Mayuresh Chitale <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Smstateen extension provides a mechanism to plug potential
covert channels which are opened by extensions that add to
processor state that may not get context-switched.
Signed-off-by: Mayuresh Chitale <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add the menvcfg CSR as a HART feature and detect it at boot time
using traping mechanism.
Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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The latest RISC-V privileged specification introduces xenvcfg CSRs
to enable/disable certain features/extensions for lower privilege
modes. This patch adds defines for these new [m|h|s]envcfg CSRs.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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Add static detection to prevent the modification of struct fw_dynamic_info
from forgetting the modification of FW_DYNAMIC_INFO_xxx_OFFSET
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add static detection to prevent the modification of struct sbi_scratch
from forgetting the modification of SBI_SCRATCH_xxx_OFFSET
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add static detection to prevent the modification of struct sbi_platform
from forgetting the modification of SBI_PLATFORM_xxx_OFFSET
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Initial commit of the xlnx-uartlite device and FDT support. This was
tested by running OpenSBI on a modified QEMU virt machine using the
xlnx-uartlite for serial.
Signed-off-by: Alistair Francis <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Currently, the external interrupt handling is scattered between
sbi_init and sbi_trap. This patch moves all external interrupt
handling into a simple framework called sbi_irqchip.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Be more verbose on region confict, print addresses in conflict.
Signed-off-by: Nikita Shubin <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We should disable APLIC DT nodes in fdt_fixups() which are not
accessible to the next booting stage based on currently assigned
domain.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add simple FDT irqchip driver for APLIC so that generic platform (and
other FDT based platforms) can utilize common APLIC initialization library.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add simple APLIC initialization library which is independent of
hardware description format (FDT or ACPI). This APLIC initialization
library can be used by custom OpenSBI platform support to setup
APLIC domains.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We should disable IMSIC DT nodes in fdt_fixups() which are not
accessible to the next booting stage based on currently assigned
domain.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add simple FDT irqchip driver for IMSIC so that generic platform
(and other FDT based platforms) can utilize common IMIC library.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add simple IMSIC library which is independent of hardware description
format (FDT or ACPI). This IMSIC library can be used by custom OpenSBI
platform support to setup IMSIC for external interrupts.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We introduce nascent_init() platform callback which will allow
platforms to do very early initialization of platform specific
per-HART CSRs and per-HART devices.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch adds sbi_trap_set_external_irqfn() API which can be used by
OpenSBI platform code to set a callback function for external interrupts.
The RISC-V AIA IMSIC driver will use this API to implement inter-processor
interrupts on-top-of MSIs.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We extend HART feature detection to discover AIA CSRs at boot-time.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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The RISC-V AIA specification improves handling of per-HART local
interrupts in a backward compatible manner. This patch adds defines
for the new RISC-V AIA CSRs.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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In a systems that provide strings.h and it is included
together with sbi_bitops.h the compilation error appears.
The ffs() and fls() are provided by strings.h
Signed-off-by: Petro Karashchenko <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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PMU overflow interrupt should be disabled durinig initial configuration of
counters. They should be enabled while starting counters.
Fixes: 730f01bb41a6 ("lib: sbi: Support sscofpmf extension in OpenSBI")
Signed-off-by: Atish Patra <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Using "void *" in arithmetic causes errors with strict compiler settings:
"error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith]"
Avoid these by calculating on "char *" where 1-byte data size is assumed.
Signed-off-by: Jukka Laitinen <[email protected]>
Reviewed-by: Dong Du <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Some of RISC-V emulators provide HTIF at fixed base address so for
such emulators users have to hard-code HTIF base address in the
linker script.
To address this problem, we let users optionally provide fixed HTIF
base address via platform support (or device tree).
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Dong Du <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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This patch updates OpenSBI version to 1.0 as part of
release preparation.
Signed-off-by: Anup Patel <[email protected]>
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RISC-V privilege specification does not specify how to encode the event ID.
Therefore, each platform is allowed to customize its own encoding rule.
The common encoding methods are as follow, directly assigning a number to an
event, or every bit in the mphmevent CSR controls one specified event or
mixes the above two methods.
To enable OpenSBI to support the above three encoding methods simultaneously,
this patch repurpose the dt property "riscv,raw-event-to-mhpmcounters". The
"riscv,raw-event-to-mhpmcounters" will describes the one or multiple raw
events that could be counted by a set of counters. But, the column number
of "riscv,raw-event-to-mhpmcounters" is extended from 2 to 3. The 1st column
(64bit) is the ID of the raw events. The 2nd column (64bit) represents a
select_mask now to represent the bits used for event ID encoding.
If a platform directly encodes each raw PMU event as a unique ID,
the value of select_mask will be 0xffffffff_ffffffff.
Signed-off-by: Vincent Chen <[email protected]>
Signed-off-by: Atish Patra<[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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BUG and BUG_ON are not informative and are rather lazy interfaces, only
telling the user that something went wrong in a given function, but not
what, requiring the user to find the sources corresponding to their
firmware (which may not be available) and figure out how that BUG(_ON)
was hit. Even SBI_ASSERT in its current form, which does include the
condition that triggered it in the output, isn't necessarily very
informative. In some cases, the error may be fixable by the user, but
they need to know the problem in order to have any hope of fixing it.
It's also a nuisance for developers, whose development trees may have
changed significantly since the release in question being used, and so
line numbers can make it harder for them to understand which error case
a user has hit.
This patch introduces a new sbi_panic function which is printf-like,
allowing detailed error messages to be printed to the console. BUG and
BUG_ON are removed, since the former is just a worse form of sbi_panic
and the latter is a worse version of SBI_ASSERT. Finally, SBI_ASSERT is
augmented to take a set of arguments to pass to sbi_panic on failure,
used like so (sbi_boot_print_hart's current error case, which currently
manually calls sbi_printf and sbi_hart_hang):
SBI_ASSERT(xlen >= 1, ("Error %d getting MISA XLEN\n", xlen));
The existing users of BUG are replaced with calls to sbi_panic along
with informative error messages. BUG_ON and SBI_ASSERT were unused (and,
in the case of SBI_ASSERT, remain unused).
Many existing users of sbi_hart_hang should be converted to use either
sbi_panic or SBI_ASSERT after this commit.
Signed-off-by: Jessica Clarke <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Add support for the UART provided by the LiteX SoC
framework (https://github.com/enjoy-digital/litex),
based on its FDT info (described in the Linux tree at
Documentation/devicetree/bindings/serial/litex,liteuart.yaml).
Signed-off-by: Gabriel Somlo <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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FDT based I2C framework on the top of I2C library.
The drivers are probed on demand by fdt_i2c_adapter_get
function.
Tested-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Alexandre Ghiti <[email protected]>
Tested-by: Alexandre Ghiti <[email protected]>
Signed-off-by: Nikita Shubin <[email protected]>
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Helper library to keep track of registered I2C adapters,
identified by dts offset, basic send/read functions and
adapter configuration (enable, set dividers, etc...).
Tested-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Alexandre Ghiti <[email protected]>
Tested-by: Alexandre Ghiti <[email protected]>
Signed-off-by: Nikita Shubin <[email protected]>
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Move driver init code to separate function, so it can be reused
elsewhere.
Tested-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Alexandre Ghiti <[email protected]>
Tested-by: Alexandre Ghiti <[email protected]>
Signed-off-by: Nikita Shubin <[email protected]>
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A platform may use programmable counters for cycle/instret events.
The priv spec allows that provided that cycle/instret also report those
events in addition to the programmable counters. We should allow that
functionality in OpenSBI.
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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This patch adds sscofpmf extension in pmu module which includes
following things.
1. Enable overflow irq when starting a counter.
2. Setting the correct event filters passed from supervisor.
3. Delegating the overflow interrupt to the supervisor.
4. Add RV32 support for sscofpmf.
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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OpenSBI doesn't handle PMU counters for now.
Delegate the overflow counter to S-mode always.
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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Sscofpmf ISA extension introduces PMU counter overflow and filtering support.
It introduces a read only `scountovf` csr that can be used to detect if
a hart supports this extension at runtime. However, this feature is only
useful if the hart already supports mcounteren and mcountinhibit.
Add a dynamic detection mechanism and boot time print message if sscofpmf
is present.
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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[1] https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
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The initialization of a reset driver may fail for various reasons, like
a PMIC based reset driver not finding the required I2C driver. The return
code of the init routine may take other error values than -ENODEV.
If the initialization of a reset driver fails, this should not lead to the
board hanging. It is enough that the reset driver does not call
sbi_system_reset_add_device() to avoid invoking the driver for a device
that could not be initialized.
Change the return type of fdt_reset_init() to void.
Print a message if an error occurs.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Dong Du <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Convert static array to sbi_list.
This removes size limitation, makes add/remove more efficient and
saves space.
Signed-off-by: Nikita Shubin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).
Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because all H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) we tried till now were conservatively
flushing everything upon any HFENCE.GVMA instruction.
This patch fixes GPA passed to __sbi_hfence_gvma_vmid_gpa()
and __sbi_hfence_gvma_gpa() functions.
Fixes: 331ff6a162c1 ("lib: Support stage1 and stage2 tlb flushing")
Reported-by: Ian Huang <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Dong Du <[email protected]>
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This simply adds an helper to get fdt address which is more explicit than
sbi_scratch_thishart_arg1_ptr.
Signed-off-by: Alexandre Ghiti <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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To support different handlers for different types of resets, we are
adding a sbi_list of restart handlers.
Instead of sbi_system_reset_set_device we use
sbi_system_reset_add_device to reflect the actual meaning.
Signed-off-by: Nikita Shubin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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