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Add ATCWDT200 as reset device of AE350 platform, this driver requires
SMU to program the reset vector registers before triggering WDT software
restart signal.
dts example:
smu@f0100000 {
compatible = "andestech,atcsmu";
reg = <0x00000000 0xf0100000 0x00000000 0x00001000>;
};
wdt: wdt@f0500000 {
compatible = "andestech,atcwdt200";
reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
interrupts = <3 4>;
interrupt-parent = <&plic0>;
clock-frequency = <15000000>;
};
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We update reset drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate reset
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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Instead of having FDT reset driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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One of the watchdogs in the D1 SoC provides a "soft reset" function,
which allows software to immediately reset the entire SoC. Add a driver
so it can implement the SBI system reset function.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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In preparation for adding a new fdt_reset driver, ensure the existing
lists are sorted alphabetically.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add generic GPIO reset driver inspired from gpio-restart
and gpio-poweroff drivers of Linux kernel.
Signed-off-by: Green Wan <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Unify all the file and function names of 'sifive_test' device, to use
the same prefix. This is also a preparatory patch for upcoming sifive
reset device.
Signed-off-by: Green Wan <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This driver is for T-HEAD test chip, fpga. It could work with
all T-HEAD riscv processors: C9xx series.
example1: (Using io-regs for reset)
reset: reset-sample {
compatible = "thead,reset-sample";
plic-delegate = <0xff 0xd81ffffc>;
entry-reg = <0xff 0xff019050>;
entry-cnt = <4>;
control-reg = <0xff 0xff015004>;
control-val = <0x1c>;
csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
};
example2: (Using csr-regs for reset)
reset: reset-sample {
compatible = "thead,reset-sample";
plic-delegate = <0xff 0xd81ffffc>;
using-csr-reset;
csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
0x3b0 0x3b1 0x3b2 0x3b3
0x3b4 0x3b5 0x3b6 0x3b7
0x3a0>;
};
example3: (Only delegate plic enable to S-mode)
reset: reset-sample {
compatible = "thead,reset-sample";
plic-delegate = <0xff 0xd81ffffc>;
};
After this patch, all T-HEAD c9xx would use platform/generic with fw_dynamic
as default:
CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make
The platform/thead will be deprecated.
Signed-off-by: Guo Ren <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add simple reset framework which will select and use reset driver
based on details in FDT passed by previous booting stage.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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