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2019-02-20include: Add PRILX define to help print unsigned longAnup Patel
The unsigned long is always machine word size. This means it is 4 bytes on 32bit system and 8 bytes on 64bit system. This patch adds PRILX define for sbi_printf() which will help us print unsigned long without worrying whether it is 32bit or 64bit system. Signed-off-by: Anup Patel <[email protected]>
2019-02-18lib: Fix mask shift in sbi_ipi_send_many()Anup Patel
The mask shift in for-loop of sbi_ipi_send_many() is broken with commit 918c1354b75c74b62f67c4e929551d643f035443 ("lib: Improve delivery of SBI_IPI_EVENT_HALT") This patch fix it. Signed-off-by: Anup Patel <[email protected]>
2019-02-18lib: Fix small typo on sbi_ipi.cNick Kossifidis
2019-02-18lib: Improve delivery of SBI_IPI_EVENT_HALTNick Kossifidis
When sbi_ipi_send_many gets called with the current hartid included on pmask (or when pmask is NULL), and we send a HALT event, since the for loop works sequentially over all hartids on the mask, we may send a HALT event to the current hart before the loop finishes. So we will halt the current hart before it can deliver a HALT IPI to the rest and some harts will remain active. Make sure we send an IPI to the current hart after we've finished with everybody else. Signed-off-by: Nick Kossifidis <[email protected]>
2019-02-18lib: Send IPI for all harts to hang on system shutdownNick Kossifidis
In case the platform specific method for shutting down the system fails (or is not implemented), at least make sure that all harts hang instead of just the current hart. Signed-off-by: Nick Kossifidis <[email protected]>
2019-02-14lib: Use CSR_<FOO> instead of <foo> for csr_*()Atish Patra
Some older toolchains may not have all the csr's defined. Update all the csr functions to use the CSR_ #define values instead of the toolchain defined values. Suggested-by: Olof Johansson <[email protected]> Signed-off-by: Atish Patra <[email protected]>
2019-02-08sbi_emulate_csr: Shift sbi_timer_value directlyAlistair Francis
csr_val is a tartget length based variable, so on 32-bit devices it's only 32-bits. To avoid clearing the entire register perform both steps in a single line. Signed-off-by: Alistair Francis <[email protected]>
2019-02-08sbi_ecall: Fix logical OR to be bitwise ORAlistair Francis
Signed-off-by: Alistair Francis <[email protected]>
2019-02-05riscv_asm.h: Use CSR_<FOO> instead of <foo> for csr_read()Olof Johansson
Some toolchains might not have all the CSRs available (as seen with GCC 7.2). So, instead use the defined CSR_ values. Signed-off-by: Olof Johansson <[email protected]>
2019-01-25include: Add separate header for OpenSBI versionAnup Patel
Currently, the OpenSBI version is in top-level Makefile so firmware linking to OpenSBI static library have no-way to know OpenSBI version. This patch moves OpenSBI version from top-level Makefile to sbi/sbi_version.h header which provides OPENSBI_VERSION_MAJOR and OPENSBI_VERSION_MINOR defines. NOTE: the SBI spec (or SBI ecall interface) version is different. The SBI spec version is provided by functions sbi_ecall_version_major() and sbi_ecall_version_minor(). Signed-off-by: Anup Patel <[email protected]>
2019-01-24all: Update copyright header in all filesAnup patel
This patch updates copyright header in all files as follows: 1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line 2. Change copyright year to 2019 for Western Digital Signed-off-by: Anup Patel <[email protected]>
2019-01-23include: Rename ipi_inject() to ipi_send() for sbi_platformAnup Patel
For better naming, we rename ipi_inject() to ipi_send() in struct sbi_platform. We also replace term "inject" with "send" in all related places. Signed-off-by: Anup Patel <[email protected]>
2019-01-23include: Drop MMIO from SBI_PLATFORM_HAS_MMIO_TIMER_VALUEAnup Patel
It is not necessary that platform has MMIO-based timer value register. It can also have some custom (implementation specific) CSR for timer value. This patch renames SBI_PLATFORM_HAS_MMIO_TIMER_VALUE to SBI_PLATFORM_HAS_TIMER_VALUE to imply "platform timer value" instead of "mmio timer value". Signed-off-by: Anup Patel <[email protected]>
2019-01-23lib: Remove target_hart and hartid parameter from TIMER callbacksAnup Patel
The target_hart and hartid paramter of TIMER callbacks is not required because it always current hartid which can be obtained using sbi_current_hartid() API. Signed-off-by: Anup Patel <[email protected]>
2019-01-23lib: Remove hartid parameter from IRQCHIP callbacksAnup Patel
The hartid parameter in IRQCHIP callbacks of sbi_platform is not required because current hartid can be determined using sbi_current_hartid() API. Signed-off-by: Anup Patel <[email protected]>
2019-01-23lib: Remove source_hart and hartid parameter from IPI callbacksAnup patel
The source_hart and hartid parameter is really not required in IPI callbacks of sbi_platform because current hartid can always be obtained by calling sbi_current_hartid() API. Signed-off-by: Anup Patel <[email protected]>
2019-01-23lib: Remove hartid paramter from early_init() and final_init() callbacksAnup Patel
We simplify early_init() and final_init() callbacks of sbi_platform by removing "hartid" parameter. Signed-off-by: Anup Patel <[email protected]>
2019-01-22lib: Add doxygen style documentation for sbi_platformAnup Patel
This patch adds doxygen style documenation for struct sbi_platform and related functions/macros/defines. Signed-off-by: Anup Patel <[email protected]>
2019-01-22lib: Update documentation of sbi_init()Anup Patel
We don't need to pre-enable MSIP in MIE CSR when calling sbi_init() from firmware. This patch updates documentation accordingly. Signed-off-by: Anup Patel <[email protected]>
2019-01-22lib: Do not access mi/edeleg register if S mode is not present.Atish Patra
As per the RISC-V ISA, mideleg and medeleg registers should not exist if S-mode is not present for a hart. We shouldn't access these CSRs if non S-mode harts. Signed-off-by: Atish Patra <[email protected]>
2019-01-22lib: Allow sending IPI to self.Atish Patra
S-mode software may send IPI to self. For example, tlbflush may be executed for the same hart. Let the hart send IPI to itself. It's an overhead but doesn't break anything. However, if we don't allow it, it breaks if S-mode keep sending IPIs. Signed-off-by: Atish Patra <[email protected]>
2019-01-22lib: Fix ipi type updateAtish Patra
IPIs are updated in scratch space by source hart. However, different harts or same hart may want to send different IPIs before previous IPI was read by the target hart. Currently, previous IPI type is overwritten in that case. Use atomic bit set/clear operations to update IPIs. Signed-off-by: Atish Patra <[email protected]>
2019-01-22lib: Add atomic bit set/clear operations.Atish Patra
Add addtional functionlities for set/clear bits atomically. Signed-off-by: Atish Patra <[email protected]>
2019-01-22lib: Move software interrupt enablement from firmware to libAtish Patra
The secondary hart waits for an IPI signal from the boot hart to executing boot code (hot boot). As a result, software generated interrupts have to be enabled for secondary harts before waiting for the boot hart boot completion IPI signal. Enabling software generated interrupts (IPI) can be done independently of the firmware code and moved to libsbi code so that the different firmware do not have to implement this. Signed-off-by: Atish Patra <[email protected]>
2019-01-21lib: Use AMO instructions whenever __riscv_atomic is definedAnup Patel
We should use AMO instructions whenever __riscv_atomic is defined (i.e. atomics are supported). We use LR/SC only when __riscv_atomic is not defined. Signed-off-by: Anup Patel <[email protected]>
2019-01-21lib: code cleanupDamien Le Moal
Use commonly accepted styles: newlines after declarations and before return to make the code more readable. Signed-off-by: Damien Le Moal <[email protected]>
2019-01-21lib: Fix bannerDamien Le Moal
Define the "OpenSBI" logo string as a macro renamed BANNER, since it is one rather than a logo. Signed-off-by: Damien Le Moal <[email protected]>
2019-01-16include: Add documentation for sbi_trap_regs and friendsAnup Patel
This patch adds doxygen style documentation for struct sbi_trap_regs and related macros/defines/functions. Signed-off-by: Anup Patel <[email protected]>
2019-01-16lib: Add documentation for sbi_init() APIAnup Patel
This patch adds doxygen style documentation for sbi_init() API. Signed-off-by: Anup Patel <[email protected]>
2019-01-03lib: Handle misaligned load/store on FP regsAnup Patel
This patch extends misaligned load/store trap handling to handle FP regs as well. Signed-off-by: Anup Patel <[email protected]>
2019-01-03include: Add hard FP access macros and definesAnup Patel
This patch adds hardware floating-point (hard FP) access macros and defines. Signed-off-by: Anup Patel <[email protected]>
2019-01-02include: Remove redundant csr_read_n() and csr_write_n()Anup Patel
The patch removes redundant csr_read_n() and csr_write_n() because same thing can be achieved by using __ASM_STR() macro in csr_read() and csr_write() macros. Signed-off-by: Anup Patel <[email protected]>
2018-12-31lib: Redirect illegal instruction trap to S-mode when not handledAnup Patel
Currently, we fail with error SBI_ENOTSUPP when we are not able to handle illegal instruction trap. Instead, we should just redirect illegal instruction trap to S-mode when not handled. This redirection of illegal instruction trap will help lazy save/restore of floating point registers to work correctly in Linux kernel. Signed-off-by: Anup Patel <[email protected]>
2018-12-27lib: Print mtval in sbi_trap_error()Anup Patel
The mtval CSR is very useful information when debugging hence print it upon trap error in sbi_trap_error(). Signed-off-by: Anup Patel <[email protected]>
2018-12-27lib: Simplify sbi_platform timer_init() hooksAnup Patel
Instead of having separate timer_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one timer_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated timer_init() hook. Signed-off-by: Anup Patel <[email protected]>
2018-12-27lib: Simplify sbi_platform ipi_init() hooksAnup Patel
Instead of having separate ipi_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one ipi_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated ipi_init() hook. Signed-off-by: Anup Patel <[email protected]>
2018-12-27lib: Simplify sbi_platform irqchip_init() hooksAnup Patel
Instead of having separate irqchip_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one irqchip_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated irqchip_init() hook. Signed-off-by: Anup Patel <[email protected]>
2018-12-27lib: Simplify sbi_platform early_init() and final_init() hooksAnup Patel
Instead of having separate early_init() and final_init() hooks for cold and warm boot, this patch updates struct sbi_platform to have just one early_init() and one final_init() hook. The type of boot (cold or warm) is now a boolean flag parameter for the updated early_init() and final_init() hooks. Signed-off-by: Anup Patel <[email protected]>
2018-12-27lib: Move ECALL defines to sbi_ecall_interface.hAnup Patel
This patch moves all ECALL defines to sbi_ecall_interface.h so that it can be shared with firmware payloads. Signed-off-by: Anup Patel <[email protected]>
2018-12-26lib: Add misaligned load/store trap handlingAnup Patel
We generally don't get misaligned load/store traps from Linux/U-Boot compiled using GCC 8.2 or higher but this is not true with older GCC toolchains. To tackle this we add misaligned load/store trap handling adopted from BBL sources but much more simpler. (Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git) Signed-off-by: Anup Patel <[email protected]>
2018-12-26lib: Move instruction encoding macros to riscv_encoding.hAnup Patel
This patch moves all instruction encoding macros to riscv_encoding.h. Signed-off-by: Anup Patel <[email protected]>
2018-12-21Introduce hart disabled parameter in platform.Atish Patra
As of now, uboot doesn't have support for SMP. Moreover, unleashed board has a E51 hart which doesn't not support S mode. We should only boot only 1 non-zero hart. Signed-off-by: Atish Patra <[email protected]>
2018-12-21Introduce HAS_MFAULTS_DELEGATION featureDamien Le Moal
Conditionnally delegate page fault exceptions from M mode to S mode based on the platform features. Signed-off-by: Damien Le Moal <[email protected]>
2018-12-21lib: Remove prints from sbi_hart_switch_mode()Anup Patel
The sbi_hart_switch_mode() will be used by CPU hotplug. This means if we have prints in sbi_hart_switch_mode() then these prints will mix with Linux prints. Being a runtime firmware, we should be verbose only at coldboot time and error situations. Signed-off-by: Anup Patel <[email protected]>
2018-12-21lib: Fix delegate_traps() for Linux bootAnup Patel
commit d403c70fb11fb55042ca3cef0dbe399ed87cc79b breaks Linux booting because of fewer exceptions delegated to S-mode. This patch fixes Linux booting by having all required exceptions delegated to S-mode. Signed-off-by: Anup Patel <[email protected]>
2018-12-21console: protect output with a spinlockDamien Le Moal
Avoid getting messages from multiple harts mingled into garbage text with a spinlock serializing calls to sbi_puts() and sbi_printf(). Signed-off-by: Damien Le Moal <[email protected]>
2018-12-21Introduce sbi_current_hartid()Damien Le Moal
Use this helper instead of hardcoding csr_read(mhartid). Signed-off-by: Damien Le Moal <[email protected]>
2018-12-21Cleanup and rename sbi_hart_boot_next()Damien Le Moal
Cleanup sbi_hart_boot_nexti() code, adding messages for clarity and rename the function to sbi_hart_switch_mode() to reflect what the function actually does. Signed-off-by: Damien Le Moal <[email protected]>
2018-12-21Fix interrupt and exception delegationDamien Le Moal
When S mode is not supported, simply clear mideleg and medeleg. Otherwise, set delegation from M-mode to S-mode, removing the page fault exceptions as those would not happen in M-mode. Signed-off-by: Damien Le Moal <[email protected]>
2018-12-21Add a hang messageDamien Le Moal
Make it clear that the end of the FW execution was reached without the hand being passed to any payload. Signed-off-by: Damien Le Moal <[email protected]>