| Age | Commit message (Collapse) | Author |
|---|
|
Simulatenous requests for tlbflush IPIs can have overlapping address
ranges.
Ignore if address range is same or within already existing fifo entries.
Update the tlb flush info in fifo directly if the one of the existing
entry lies within the new flush request.
Delete all entries if flush all request is recieved for the vma.
Signed-off-by: Atish Patra <[email protected]>
|
|
Implement a lock enabled iteration for fifo so that
caller can determine if next entry can be skipped or
any existing entries in fifo can be updated before enqueue.
Signed-off-by: Atish Patra <[email protected]>
|
|
This patch reduces memory consumed by struct sbi_fifo by droping
redundant "head" member and using u16 in-place of "unsigned long".
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch does following improvements to sbi_fifo:
1. Use valid SBI_Exxxx error codes instead of -1
2. The sbi_fifo_is_full() and sbi_fifo_is_empty() did
not acquire qlock before accessing head and tail
hence fixed it
3. Added avail member for ease in debugging and simplifying
head/tail updates.
Due to above changes size of sbi_fifo changes from 48 bytes
to 56 bytes.
Signed-off-by: Anup Patel <[email protected]>
|
|
Currently, there is no provision for tracking multiple IPIs sent
to a single hart at the same time by different harts.
Use a fifo manage the outstanding requests. While dequeueing, read all
the entries once, because we have only 1 bit to track the type of IPI.
Once the queue is full, busy wait until the there is space available in
queue. This is not the most elegant approach. It should be changed in
favor of a wakeup event once available in opensbi.
Signed-off-by: Atish Patra <[email protected]>
|
|
Implement a fifo to accomodate outstanding IPIs for a specific hart
at the same time.
Signed-off-by: Atish Patra <[email protected]>
|
|
The mstatus parameter of get_insn() is used to return MSTATUS CSR
value which get_insn() saw. Most of the get_insn() callers don't
use the value returned in mstatus so this patch makes mstatus
parameter optional for get_insn().
Signed-off-by: Anup Patel <[email protected]>
|
|
The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch removes unused mepc arg from load_xyz() and store_xyz()
unpriviledge access functions.
Signed-off-by: Anup Patel <[email protected]>
|
|
Use the newly introduced "options" in "struct sbi_scratch" to
conditionally disable the boot prints.
Signed-off-by: Bin Meng <[email protected]>
|
|
Refactor the codes a little bit to put all prints during boot into
sbi_boot_prints().
Signed-off-by: Bin Meng <[email protected]>
|
|
OpenSBI should show error trace only if any valid SBI function
does not perform as expected.
However, OpenSBI should show notify the caller with a negative
error if given SBI function ID is not valid.
Signed-off-by: Atish Patra <[email protected]>
|
|
Currently, global page mappings are not flushed if start and size
arguments are zero.
Flush entire TLB if both size and start argument is passed as zero.
Fixes : 90cb491 (lib: Implement sfence.vma correctly)
Signed-off-by: Atish Patra <[email protected]>
|
|
Currently, OpenSBI doesn't distinguish between sfence.vma
and sfence.vm asid calls. Moreover, it ignores the page
ranges and just flush entire TLB everytime.
Fix the sfence implementation by keeping all the tlb flush
info in scratch area.
The relevant Linux kernel code was added by
https://patchwork.kernel.org/project/linux-riscv/list/?series=89695
However, this patch is backward compatible with older version kernel
that doesn't have the above patches as well.
Fixes #87
Signed-off-by: Atish Patra <[email protected]>
|
|
Create a sbi_ipi_data structure that holds unpacked IPI information. At
the same time remove ipi_type from the sbi_scratch struct and use a
fixed offset to access it.
This structure fits in behind the sbi_scratch structure.
This fixes https://github.com/riscv/opensbi/issues/81
Signed-off-by: Alistair Francis <[email protected]>
|
|
platform should be a read-only variable, if it is placed in the data
segment, it may be exploited.
Signed-off-by: Xiang Wang <[email protected]>
|
|
As per the current SBI specification, sbi_getc should return
an int instead of char.
In case of FIFO is empty, return -1 as per the specification.
Reported-by: Sergi Granell <[email protected]>
Suggested-by:Thadeu Lima de Souza Cascardo <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
|
|
The unsigned long is always machine word size. This means it is
4 bytes on 32bit system and 8 bytes on 64bit system.
This patch adds PRILX define for sbi_printf() which will help us
print unsigned long without worrying whether it is 32bit or 64bit
system.
Signed-off-by: Anup Patel <[email protected]>
|
|
The mask shift in for-loop of sbi_ipi_send_many() is
broken with commit 918c1354b75c74b62f67c4e929551d643f035443
("lib: Improve delivery of SBI_IPI_EVENT_HALT")
This patch fix it.
Signed-off-by: Anup Patel <[email protected]>
|
|
|
|
When sbi_ipi_send_many gets called with the current hartid
included on pmask (or when pmask is NULL), and we send
a HALT event, since the for loop works sequentially over
all hartids on the mask, we may send a HALT event to the
current hart before the loop finishes. So we will halt
the current hart before it can deliver a HALT IPI to the
rest and some harts will remain active.
Make sure we send an IPI to the current hart after we've
finished with everybody else.
Signed-off-by: Nick Kossifidis <[email protected]>
|
|
In case the platform specific method for shutting down
the system fails (or is not implemented), at least make
sure that all harts hang instead of just the current hart.
Signed-off-by: Nick Kossifidis <[email protected]>
|
|
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Suggested-by: Olof Johansson <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
|
|
csr_val is a tartget length based variable, so on 32-bit devices it's
only 32-bits. To avoid clearing the entire register perform both steps
in a single line.
Signed-off-by: Alistair Francis <[email protected]>
|
|
Signed-off-by: Alistair Francis <[email protected]>
|
|
Some toolchains might not have all the CSRs available (as seen with
GCC 7.2). So, instead use the defined CSR_ values.
Signed-off-by: Olof Johansson <[email protected]>
|
|
Currently, the OpenSBI version is in top-level Makefile so
firmware linking to OpenSBI static library have no-way to
know OpenSBI version.
This patch moves OpenSBI version from top-level Makefile to
sbi/sbi_version.h header which provides OPENSBI_VERSION_MAJOR
and OPENSBI_VERSION_MINOR defines.
NOTE: the SBI spec (or SBI ecall interface) version is
different. The SBI spec version is provided by functions
sbi_ecall_version_major() and sbi_ecall_version_minor().
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital
Signed-off-by: Anup Patel <[email protected]>
|
|
For better naming, we rename ipi_inject() to ipi_send() in
struct sbi_platform. We also replace term "inject" with
"send" in all related places.
Signed-off-by: Anup Patel <[email protected]>
|
|
It is not necessary that platform has MMIO-based timer value
register. It can also have some custom (implementation specific)
CSR for timer value.
This patch renames SBI_PLATFORM_HAS_MMIO_TIMER_VALUE to
SBI_PLATFORM_HAS_TIMER_VALUE to imply "platform timer value"
instead of "mmio timer value".
Signed-off-by: Anup Patel <[email protected]>
|
|
The target_hart and hartid paramter of TIMER callbacks is not
required because it always current hartid which can be obtained
using sbi_current_hartid() API.
Signed-off-by: Anup Patel <[email protected]>
|
|
The hartid parameter in IRQCHIP callbacks of sbi_platform
is not required because current hartid can be determined
using sbi_current_hartid() API.
Signed-off-by: Anup Patel <[email protected]>
|
|
The source_hart and hartid parameter is really not required in
IPI callbacks of sbi_platform because current hartid can always
be obtained by calling sbi_current_hartid() API.
Signed-off-by: Anup Patel <[email protected]>
|
|
We simplify early_init() and final_init() callbacks of sbi_platform
by removing "hartid" parameter.
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch adds doxygen style documenation for struct sbi_platform
and related functions/macros/defines.
Signed-off-by: Anup Patel <[email protected]>
|
|
We don't need to pre-enable MSIP in MIE CSR when
calling sbi_init() from firmware. This patch updates
documentation accordingly.
Signed-off-by: Anup Patel <[email protected]>
|
|
As per the RISC-V ISA, mideleg and medeleg registers should not exist
if S-mode is not present for a hart.
We shouldn't access these CSRs if non S-mode harts.
Signed-off-by: Atish Patra <[email protected]>
|
|
S-mode software may send IPI to self. For example,
tlbflush may be executed for the same hart.
Let the hart send IPI to itself. It's an overhead
but doesn't break anything. However, if we don't
allow it, it breaks if S-mode keep sending IPIs.
Signed-off-by: Atish Patra <[email protected]>
|
|
IPIs are updated in scratch space by source hart.
However, different harts or same hart may want to
send different IPIs before previous IPI was read
by the target hart. Currently, previous IPI type
is overwritten in that case.
Use atomic bit set/clear operations to update IPIs.
Signed-off-by: Atish Patra <[email protected]>
|
|
Add addtional functionlities for set/clear bits
atomically.
Signed-off-by: Atish Patra <[email protected]>
|
|
The secondary hart waits for an IPI signal from the boot hart to
executing boot code (hot boot). As a result, software generated
interrupts have to be enabled for secondary harts before waiting for
the boot hart boot completion IPI signal.
Enabling software generated interrupts (IPI) can be done independently
of the firmware code and moved to libsbi code so that the different
firmware do not have to implement this.
Signed-off-by: Atish Patra <[email protected]>
|
|
We should use AMO instructions whenever __riscv_atomic is
defined (i.e. atomics are supported). We use LR/SC only when
__riscv_atomic is not defined.
Signed-off-by: Anup Patel <[email protected]>
|
|
Use commonly accepted styles: newlines after declarations and before
return to make the code more readable.
Signed-off-by: Damien Le Moal <[email protected]>
|
|
Define the "OpenSBI" logo string as a macro renamed BANNER, since
it is one rather than a logo.
Signed-off-by: Damien Le Moal <[email protected]>
|
|
This patch adds doxygen style documentation for struct sbi_trap_regs
and related macros/defines/functions.
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch adds doxygen style documentation for sbi_init() API.
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch extends misaligned load/store trap handling to
handle FP regs as well.
Signed-off-by: Anup Patel <[email protected]>
|
|
This patch adds hardware floating-point (hard FP) access
macros and defines.
Signed-off-by: Anup Patel <[email protected]>
|
|
The patch removes redundant csr_read_n() and csr_write_n()
because same thing can be achieved by using __ASM_STR()
macro in csr_read() and csr_write() macros.
Signed-off-by: Anup Patel <[email protected]>
|
|
Currently, we fail with error SBI_ENOTSUPP when we are not able
to handle illegal instruction trap. Instead, we should just
redirect illegal instruction trap to S-mode when not handled.
This redirection of illegal instruction trap will help lazy
save/restore of floating point registers to work correctly in
Linux kernel.
Signed-off-by: Anup Patel <[email protected]>
|
