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save/restore helpers
Currently the context save/restore helpers writes/reads the provided
array using an index whose maximum value is determined by PLIC, which
potentially may disagree with the caller to these helpers.
Add a parameter to ask the caller to provide the size limit of the
array to ensure no out-of-bound access happens.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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save/restore helpers
Currently the priority save/restore helpers writes/reads the provided
array using an index whose maximum value is determined by PLIC, which
potentially may disagree with the caller to these helpers.
Add a parameter to ask the caller to provide the size limit of the
array to ensure no out-of-bound access happens.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This commit provides basic support for the Renesas RZ/Five
(R9A07G043F) SoC.
The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP)
1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include:
- Gigabit Ethernet 2ch
- CAN interface (CAN-FD) 2ch
- USB 2.0 interface 2ch
- SD interface 2ch
- AD converter 2ch
Useful links:
-------------
Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet
Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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It makes sense to use fdt_match_node() instead of fdt_find_match()
in fw_platform_lookup_special() as we already have the start offset
to search from.
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We move andes directory to platform/generic as the necessary fdt
drivers are available, the users can enable the console, timer, ipi,
irqchip and reset devices by adding device tree nodes stated in the
docs/platform/andes-ae350.md.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Corrected the same parameter of writel_relaxed in sun20i_d1_riscv_cfg_init
to be u32 for a while and u64 for a while.
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Remove "#include <sbi/sbi_console.h>"
Signed-off-by: Leizheng Zhang <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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Add domains_init platform hook for Andes AE350, users can add domain
description in device tree and select FDT domain support in Kconfig
to achieve system-level partitioning.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Move Andes PLICSW ipi device to fdt ipi framework, this patch is based
on Leo's modified IPI scheme on PLICSW.
Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI
from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according
to spec. After some investigation, self-IPI seems to be seldom or never
used, so we re-order the IPI scheme to support 8 core platforms.
dts example (Quad-core AX45MP):
plicsw: interrupt-controller@e6400000 {
compatible = "andestech,plicsw";
reg = <0x00000000 0xe6400000 0x00000000 0x00400000>;
interrupts-extended = <&CPU0_intc 3
&CPU1_intc 3
&CPU2_intc 3
&CPU3_intc 3>;
interrupt-controller;
#address-cells = <2>;
#interrupt-cells = <2>;
};
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch adds fw_platform_init() to initialize ae350 platform.name
and platform.hart_count by parsing device tree.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Andes PLIC is compatible with plic driver. The PLIC base address and
number of source can be obtained by parsing the device tree.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add ATCWDT200 as reset device of AE350 platform, this driver requires
SMU to program the reset vector registers before triggering WDT software
restart signal.
dts example:
smu@f0100000 {
compatible = "andestech,atcsmu";
reg = <0x00000000 0xf0100000 0x00000000 0x00001000>;
};
wdt: wdt@f0500000 {
compatible = "andestech,atcwdt200";
reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
interrupts = <3 4>;
interrupt-parent = <&plic0>;
clock-frequency = <15000000>;
};
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.
dts example (Quad-core AX45MP):
cpus {
...
timebase-frequency = <0x3938700>;
...
}
soc {
...
plmt0@e6000000 {
compatible = "andestech,plmt0";
reg = <0x00 0xe6000000 0x00 0x100000>;
interrupts-extended = <&cpu0_intc 0x07
&cpu1_intc 0x07
&cpu2_intc 0x07
&cpu3_intc 0x07>;
};
...
}
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Andes UART is compatible with uart8250 driver. We can use
fdt_serial_init() as platform console init hook.
dts example:
serial0: serial@f0300000 {
compatible = "andestech,uart16550", "ns16550a";
reg = <0x00000000 0xf0300000 0x00000000 0x00001000>;
interrupts = <9 4>;
interrupt-parent = <&plic0>;
clock-frequency = <19660800>;
current-speed = <38400>;
reg-shift = <2>;
reg-offset = <32>;
reg-io-width = <4>;
no-loopback-test = <1>;
};
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch makes andes platform name and version can be set in
menuconfig interface.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The boot-time cache operations have been handled by U-boot SPL, so we
can drop duplicate code.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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With the T-HEAD C9XX cores being designed before or during ratification
of the SSCOFPMF extension, they implement a PMU extension that behaves
very similar but not equal to it by providing overflow interrupts though
in a slightly different registers format.
The sun20i-d1 is using this core. So implement the necessary overrides
to allow its pmu to be used via the standard sbi-pmu extension.
For now it's also the only soc using this core, so keep the additional
code in the d1-space for now.
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Guo Ren <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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Init of non-standard extensions is a platform-specific thing,
so allow generic platforms to do this via a platform-override.
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Guo Ren <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Kautuk Consul <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add Cadence UART driver
Signed-off-by: Jun Liang Tan <[email protected]>
Signed-off-by: Wei Liang Lim <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The options defined in config.mk can be specified in objects.mk of each
platform so let us remove config.mk from all platforms.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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The generic platform version and default name should be set based
on kconfig options so that users can override it.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update generic platform to use kconfig for enabling/disabling
platform overrides. We also enable all platform overrides in generic
platform defconfig.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update FDT support makefile to use kconfig for enabling/disabling.
To avoid compilation errors, we also enable FDT for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update gpio drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate gpio
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update i2c drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate i2c
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update irqchip drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate irqchip
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update ipi drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate ipi
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update timer drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate timer
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update reset drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate reset
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update serial drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate serial
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We extend the top-level makefile to allow kconfig based configuration
for each platform where each platform has it's own set of configs with
"defconfig" being the default config.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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While it doesn't look like there are any current cases of using
uninitialized data, let's zero all the UART data members to be
safe. Zero may not actually be better than a random number in
some cases, so all structure members should still be validated
before use, but at least zero is usually easier to debug than
some random stack garbage...
Signed-off-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Allwinner D1 contains a "PPU" power domain controller which can
automatically power down/up the CPU power domain. This power domain
includes the C906 core along with its CLINT and PLIC.
This HSM implementation supports non-retentive hart suspend by:
1) Saving/restoring state that is lost during hart suspend,
2) Performing cache maintenance before/after hart suspend,
3) Configuring wakeup sources before hart suspend, and
4) Asking the PPU to power down the hart when it enters WFI.
Since this HSM implementation is for a single-core SoC, it does not need
to worry about concurrency or saving multiple instances of state.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
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This simplifies both the callers and the callees by removing duplicated
code and consolidating the error handling. It also fixes two bugs in the
process:
1) ie_words was one too large when plic->num_src was a multiple of 32.
2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA
platforms previously only enabled one out of every 32 interrupts.
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
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Allow the vendor_ext_check and vendor_ext_provider APIs of the
generic platform to be overridden by other platforms
Signed-off-by: Mayuresh Chitale <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Ignore CPU nodes in FDT which are not enabled.
Signed-off-by: Jan Remes <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Let us move SiFive platform overrides for FU540 and FU740 into a separate
directory so better maintainability. Other SoC vendors can also create
their own directory under platform/generic.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Instead of having platform override module list hard-coded in the C source,
we generate it using carray.sh at compile-time.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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reg-offset property is used for offset to apply to the mapbase
from the start of the registers in 8250 UART. In Linux kernel,
it has been handled in 8250 UART driver.
dt-bindings:
<linux>/Documentation/devicetree/bindings/serial/8250.yaml
Signed-off-by: Zong Li <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add simple FDT irqchip driver for IMSIC so that generic platform
(and other FDT based platforms) can utilize common IMIC library.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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When the watchdog is running the HiFive Unmatched board does not reboot
properly and shuts down itself a few seconds after reboot, in the early
stages of the u-boot loading. On a Linux kernel this happens when the
da9063_wdt module is loaded. This does not happen if the module is
unloaded before reboot or if the watchdog module is loaded with
"stop_on_reboot=1".
Fix that by stopping the watchdog before attempting to reset the board.
This is done by zeroing the TWDSCALE field of CONTROL_D register, unless
it was already set to 0.
Reported-by: Tianon Gravi <[email protected]>
Signed-off-by: Aurelien Jarno <[email protected]>
Reviewed-by: Nikita Shubin <[email protected]>
Tested-by: Nikita Shubin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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da9063_reset() and da9063_shutdown() take the chip address in argument
(like similar functions), but in practice use the da9063 global struct
instead. Fix that.
Signed-off-by: Aurelien Jarno <[email protected]>
Reviewed-by: Nikita Shubin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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BUG and BUG_ON are not informative and are rather lazy interfaces, only
telling the user that something went wrong in a given function, but not
what, requiring the user to find the sources corresponding to their
firmware (which may not be available) and figure out how that BUG(_ON)
was hit. Even SBI_ASSERT in its current form, which does include the
condition that triggered it in the output, isn't necessarily very
informative. In some cases, the error may be fixable by the user, but
they need to know the problem in order to have any hope of fixing it.
It's also a nuisance for developers, whose development trees may have
changed significantly since the release in question being used, and so
line numbers can make it harder for them to understand which error case
a user has hit.
This patch introduces a new sbi_panic function which is printf-like,
allowing detailed error messages to be printed to the console. BUG and
BUG_ON are removed, since the former is just a worse form of sbi_panic
and the latter is a worse version of SBI_ASSERT. Finally, SBI_ASSERT is
augmented to take a set of arguments to pass to sbi_panic on failure,
used like so (sbi_boot_print_hart's current error case, which currently
manually calls sbi_printf and sbi_hart_hang):
SBI_ASSERT(xlen >= 1, ("Error %d getting MISA XLEN\n", xlen));
The existing users of BUG are replaced with calls to sbi_panic along
with informative error messages. BUG_ON and SBI_ASSERT were unused (and,
in the case of SBI_ASSERT, remain unused).
Many existing users of sbi_hart_hang should be converted to use either
sbi_panic or SBI_ASSERT after this commit.
Signed-off-by: Jessica Clarke <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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da9063 PMIC can be used to reset/shutdown the
Sifive Unmatched board.
shutdown is done simply by writing SHUTDOWN bit to
DA9063_REG_CONTROL_F register.
reset via setting WAKEUP bit in DA9063_REG_CONTROL_F
register followed by masking POWER and POWER1 domains
and setting STANDBY bit in DA9063_REG_CONTROL_A,
originally discovered by Alexandre Ghiti on linux-riscv
maillists.
Tested-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Alexandre Ghiti <[email protected]>
Tested-by: Alexandre Ghiti <[email protected]>
Signed-off-by: Nikita Shubin <[email protected]>
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Move the fdt_reset_init() invocation from generic_early_init() to
generic_final_init(). This allows to print error messages.
Ignore the return value of fdt_reset_init() as we should not stop booting
due to failure to initialize reset drivers.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Dong Du <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This simply adds an helper to get fdt address which is more explicit than
sbi_scratch_thishart_arg1_ptr.
Signed-off-by: Alexandre Ghiti <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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To support different handlers for different types of resets, we are
adding a sbi_list of restart handlers.
Instead of sbi_system_reset_set_device we use
sbi_system_reset_add_device to reflect the actual meaning.
Signed-off-by: Nikita Shubin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Generic mdelay() and udelay() functions can be provided by the
sbi_timer framework if timer frequency is available in the timer
instance provided by the platform support or timer driver.
This patch adds timer frequency (timer_freq) member in the
struct sbi_timer_device for above purpose.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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We extend the ACLINT library to support separate base addresses
for MTIME and MTIMECMP registers.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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