From e8dfa55f3d6ada2e1f71671213bd3a68ec96ea76 Mon Sep 17 00:00:00 2001 From: Manuel Hernández Méndez Date: Thu, 23 Oct 2025 11:03:47 +0200 Subject: platform: ariane: Move ariane platform from fpga to generic MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Ariane framework has a generic PMU that is not used by OpenSBI. Due to OpenSBI’s build system we cannot directly reuse the generic platform functions, so move the Ariane platform to generic. Also due to the generic platform is where new features are added. Signed-off-by: Manuel Hernández Méndez Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20251023090347.30746-1-maherme.dev@gmail.com Signed-off-by: Anup Patel --- docs/platform/fpga-ariane.md | 4 +- docs/platform/generic.md | 2 + docs/platform/platform.md | 5 -- platform/fpga/ariane/Kconfig | 10 --- platform/fpga/ariane/configs/defconfig | 0 platform/fpga/ariane/objects.mk | 42 ---------- platform/fpga/ariane/platform.c | 143 -------------------------------- platform/generic/Kconfig | 4 + platform/generic/configs/defconfig | 1 + platform/generic/openhwgroup/ariane.c | 137 ++++++++++++++++++++++++++++++ platform/generic/openhwgroup/objects.mk | 3 + scripts/create-binary-archive.sh | 1 - 12 files changed, 149 insertions(+), 203 deletions(-) delete mode 100644 platform/fpga/ariane/Kconfig delete mode 100644 platform/fpga/ariane/configs/defconfig delete mode 100644 platform/fpga/ariane/objects.mk delete mode 100644 platform/fpga/ariane/platform.c create mode 100644 platform/generic/openhwgroup/ariane.c diff --git a/docs/platform/fpga-ariane.md b/docs/platform/fpga-ariane.md index 9b1e1566..720cb172 100644 --- a/docs/platform/fpga-ariane.md +++ b/docs/platform/fpga-ariane.md @@ -13,7 +13,7 @@ The FPGA SoC currently contains the following peripherals: - Bootrom containing zero stage bootloader and device tree. To build platform specific library and firmwares, provide the -*PLATFORM=fpga/ariane* parameter to the top level `make` command. +*PLATFORM=generic* parameter to the top level `make` command. Platform Options ---------------- @@ -26,7 +26,7 @@ Building Ariane FPGA Platform **Linux Kernel Payload** ``` -make PLATFORM=fpga/ariane FW_PAYLOAD_PATH=/arch/riscv/boot/Image +make PLATFORM=generic FW_PAYLOAD_PATH=/arch/riscv/boot/Image ``` Booting Ariane FPGA Platform diff --git a/docs/platform/generic.md b/docs/platform/generic.md index 495baa73..c48d6a9a 100644 --- a/docs/platform/generic.md +++ b/docs/platform/generic.md @@ -48,6 +48,7 @@ RISC-V Platforms Using Generic Platform * **Spike** (*[spike.md]*) * **T-HEAD C9xx series Processors** (*[thead-c9xx.md]*) * **OpenPiton FPGA SoC** (*[fpga-openpiton.md]*) +* **Ariane FPGA SoC** (*[fpga-ariane.md]*) [andes-ae350.md]: andes-ae350.md [qemu_virt.md]: qemu_virt.md @@ -57,3 +58,4 @@ RISC-V Platforms Using Generic Platform [spike.md]: spike.md [thead-c9xx.md]: thead-c9xx.md [fpga-openpiton.md]: fpga-openpiton.md +[fpga-ariane.md]: fpga-ariane.md diff --git a/docs/platform/platform.md b/docs/platform/platform.md index 048c2c4f..b77112ff 100644 --- a/docs/platform/platform.md +++ b/docs/platform/platform.md @@ -21,10 +21,6 @@ OpenSBI currently supports the following virtual and hardware platforms: * **Kendryte K210 SoC**: Platform support for the Kendryte K210 SoC used on boards such as the Kendryte KD233 or the Sipeed MAIX Dock. -* **Ariane FPGA SoC**: Platform support for the Ariane FPGA SoC used on - Genesys 2 board. More details on this platform can be found in the file - *[fpga-ariane.md]*. - * **Andes AE350 SoC**: Platform support for the Andes's SoC (AE350). More details on this platform can be found in the file *[andes-ae350.md]*. @@ -48,7 +44,6 @@ comments to facilitate the implementation. [generic.md]: generic.md [qemu_virt.md]: qemu_virt.md [sifive_fu540.md]: sifive_fu540.md -[fpga-ariane.md]: fpga-ariane.md [andes-ae350.md]: andes-ae350.md [thead-c910.md]: thead-c910.md [spike.md]: spike.md diff --git a/platform/fpga/ariane/Kconfig b/platform/fpga/ariane/Kconfig deleted file mode 100644 index e1f118b6..00000000 --- a/platform/fpga/ariane/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: BSD-2-Clause - -config PLATFORM_ARIANE_FPGA - bool - select FDT - select IPI_MSWI - select IRQCHIP_PLIC - select SERIAL_UART8250 - select TIMER_MTIMER - default y diff --git a/platform/fpga/ariane/configs/defconfig b/platform/fpga/ariane/configs/defconfig deleted file mode 100644 index e69de29b..00000000 diff --git a/platform/fpga/ariane/objects.mk b/platform/fpga/ariane/objects.mk deleted file mode 100644 index d1177f41..00000000 --- a/platform/fpga/ariane/objects.mk +++ /dev/null @@ -1,42 +0,0 @@ -# -# SPDX-License-Identifier: BSD-2-Clause -# -# Copyright (C) 2019 FORTH-ICS/CARV -# Panagiotis Peristerakis -# - -# Compiler flags -platform-cppflags-y = -platform-cflags-y = -platform-asflags-y = -platform-ldflags-y = - -# Object to build -platform-objs-y += platform.o - -PLATFORM_RISCV_XLEN = 64 - -# Blobs to build -FW_JUMP=n - -ifeq ($(PLATFORM_RISCV_XLEN), 32) - # This needs to be 4MB aligned for 32-bit support - FW_JUMP_ADDR=0x80400000 - else - # This needs to be 2MB aligned for 64-bit support - FW_JUMP_ADDR=0x80200000 - endif -FW_JUMP_FDT_ADDR=0x82200000 - -# Firmware with payload configuration. -FW_PAYLOAD=y - -ifeq ($(PLATFORM_RISCV_XLEN), 32) -# This needs to be 4MB aligned for 32-bit support - FW_PAYLOAD_OFFSET=0x400000 -else -# This needs to be 2MB aligned for 64-bit support - FW_PAYLOAD_OFFSET=0x200000 -endif -FW_PAYLOAD_FDT_ADDR=0x82200000 -FW_PAYLOAD_ALIGN=0x1000 diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c deleted file mode 100644 index 1b6b052f..00000000 --- a/platform/fpga/ariane/platform.c +++ /dev/null @@ -1,143 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ -/* - * Copyright (C) 2019 FORTH-ICS/CARV - * Panagiotis Peristerakis - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define ARIANE_UART_ADDR 0x10000000 -#define ARIANE_UART_FREQ 50000000 -#define ARIANE_UART_BAUDRATE 115200 -#define ARIANE_UART_REG_SHIFT 2 -#define ARIANE_UART_REG_WIDTH 4 -#define ARIANE_UART_REG_OFFSET 0 -#define ARIANE_UART_CAPS 0 -#define ARIANE_PLIC_ADDR 0xc000000 -#define ARIANE_PLIC_SIZE (0x200000 + \ - (ARIANE_HART_COUNT * 0x1000)) -#define ARIANE_PLIC_NUM_SOURCES 3 -#define ARIANE_HART_COUNT 1 -#define ARIANE_CLINT_ADDR 0x2000000 -#define ARIANE_ACLINT_MTIMER_FREQ 1000000 -#define ARIANE_ACLINT_MSWI_ADDR (ARIANE_CLINT_ADDR + \ - CLINT_MSWI_OFFSET) -#define ARIANE_ACLINT_MTIMER_ADDR (ARIANE_CLINT_ADDR + \ - CLINT_MTIMER_OFFSET) - -static struct plic_data plic = { - .addr = ARIANE_PLIC_ADDR, - .size = ARIANE_PLIC_SIZE, - .num_src = ARIANE_PLIC_NUM_SOURCES, - .flags = PLIC_FLAG_ARIANE_BUG, - .context_map = { - [0] = { 0, 1 }, - }, -}; - -static struct aclint_mswi_data mswi = { - .addr = ARIANE_ACLINT_MSWI_ADDR, - .size = ACLINT_MSWI_SIZE, - .first_hartid = 0, - .hart_count = ARIANE_HART_COUNT, -}; - -static struct aclint_mtimer_data mtimer = { - .mtime_freq = ARIANE_ACLINT_MTIMER_FREQ, - .mtime_addr = ARIANE_ACLINT_MTIMER_ADDR + - ACLINT_DEFAULT_MTIME_OFFSET, - .mtime_size = ACLINT_DEFAULT_MTIME_SIZE, - .mtimecmp_addr = ARIANE_ACLINT_MTIMER_ADDR + - ACLINT_DEFAULT_MTIMECMP_OFFSET, - .mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE, - .first_hartid = 0, - .hart_count = ARIANE_HART_COUNT, - .has_64bit_mmio = true, -}; - -/* - * Ariane platform early initialization. - */ -static int ariane_early_init(bool cold_boot) -{ - int rc; - - if (!cold_boot) - return 0; - - rc = uart8250_init(ARIANE_UART_ADDR, - ARIANE_UART_FREQ, - ARIANE_UART_BAUDRATE, - ARIANE_UART_REG_SHIFT, - ARIANE_UART_REG_WIDTH, - ARIANE_UART_REG_OFFSET, - ARIANE_UART_CAPS); - if (rc) - return rc; - - return aclint_mswi_cold_init(&mswi); -} - -/* - * Ariane platform final initialization. - */ -static int ariane_final_init(bool cold_boot) -{ - void *fdt; - - if (!cold_boot) - return 0; - - fdt = fdt_get_address_rw(); - fdt_fixups(fdt); - - return 0; -} - -/* - * Initialize the ariane interrupt controller during cold boot. - */ -static int ariane_irqchip_init(void) -{ - return plic_cold_irqchip_init(&plic); -} - -/* - * Initialize ariane timer during cold boot. - */ -static int ariane_timer_init(void) -{ - return aclint_mtimer_cold_init(&mtimer, NULL); -} - -/* - * Platform descriptor. - */ -const struct sbi_platform_operations platform_ops = { - .early_init = ariane_early_init, - .final_init = ariane_final_init, - .irqchip_init = ariane_irqchip_init, - .timer_init = ariane_timer_init, -}; - -const struct sbi_platform platform = { - .opensbi_version = OPENSBI_VERSION, - .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01), - .name = "ARIANE RISC-V", - .features = SBI_PLATFORM_DEFAULT_FEATURES, - .hart_count = ARIANE_HART_COUNT, - .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE, - .heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(ARIANE_HART_COUNT), - .platform_ops_addr = (unsigned long)&platform_ops -}; diff --git a/platform/generic/Kconfig b/platform/generic/Kconfig index aedc59a5..25b8886b 100644 --- a/platform/generic/Kconfig +++ b/platform/generic/Kconfig @@ -47,6 +47,10 @@ config PLATFORM_OPENHWGROUP_OPENPITON bool "OpenHWGroup Openpiton support" default n +config PLATFORM_OPENHWGROUP_ARIANE + bool "OpenHWGroup Ariane support" + default n + config PLATFORM_RENESAS_RZFIVE bool "Renesas RZ/Five support" select ANDES_PMA diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig index 9e040ac3..3896b0e0 100644 --- a/platform/generic/configs/defconfig +++ b/platform/generic/configs/defconfig @@ -1,6 +1,7 @@ CONFIG_PLATFORM_ALLWINNER_D1=y CONFIG_PLATFORM_ANDES_AE350=y CONFIG_PLATFORM_ANDES_QILAI=y +CONFIG_PLATFORM_OPENHWGROUP_ARIANE=y CONFIG_PLATFORM_OPENHWGROUP_OPENPITON=y CONFIG_PLATFORM_RENESAS_RZFIVE=y CONFIG_PLATFORM_SIFIVE_FU540=y diff --git a/platform/generic/openhwgroup/ariane.c b/platform/generic/openhwgroup/ariane.c new file mode 100644 index 00000000..6931e3f0 --- /dev/null +++ b/platform/generic/openhwgroup/ariane.c @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * Copyright (C) 2019 FORTH-ICS/CARV + * Panagiotis Peristerakis + */ + +#include +#include +#include +#include +#include +#include +#include + +#define ARIANE_UART_ADDR 0x10000000 +#define ARIANE_UART_FREQ 50000000 +#define ARIANE_UART_BAUDRATE 115200 +#define ARIANE_UART_REG_SHIFT 2 +#define ARIANE_UART_REG_WIDTH 4 +#define ARIANE_UART_REG_OFFSET 0 +#define ARIANE_UART_CAPS 0 +#define ARIANE_PLIC_ADDR 0xc000000 +#define ARIANE_PLIC_SIZE (0x200000 + \ + (ARIANE_HART_COUNT * 0x1000)) +#define ARIANE_PLIC_NUM_SOURCES 3 +#define ARIANE_HART_COUNT 1 +#define ARIANE_CLINT_ADDR 0x2000000 +#define ARIANE_ACLINT_MTIMER_FREQ 1000000 +#define ARIANE_ACLINT_MSWI_ADDR (ARIANE_CLINT_ADDR + \ + CLINT_MSWI_OFFSET) +#define ARIANE_ACLINT_MTIMER_ADDR (ARIANE_CLINT_ADDR + \ + CLINT_MTIMER_OFFSET) + +static struct plic_data plic = { + .addr = ARIANE_PLIC_ADDR, + .size = ARIANE_PLIC_SIZE, + .num_src = ARIANE_PLIC_NUM_SOURCES, + .flags = PLIC_FLAG_ARIANE_BUG, + .context_map = { + [0] = { 0, 1 }, + }, +}; + +static struct aclint_mswi_data mswi = { + .addr = ARIANE_ACLINT_MSWI_ADDR, + .size = ACLINT_MSWI_SIZE, + .first_hartid = 0, + .hart_count = ARIANE_HART_COUNT, +}; + +static struct aclint_mtimer_data mtimer = { + .mtime_freq = ARIANE_ACLINT_MTIMER_FREQ, + .mtime_addr = ARIANE_ACLINT_MTIMER_ADDR + + ACLINT_DEFAULT_MTIME_OFFSET, + .mtime_size = ACLINT_DEFAULT_MTIME_SIZE, + .mtimecmp_addr = ARIANE_ACLINT_MTIMER_ADDR + + ACLINT_DEFAULT_MTIMECMP_OFFSET, + .mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE, + .first_hartid = 0, + .hart_count = ARIANE_HART_COUNT, + .has_64bit_mmio = true, +}; + +/* + * Ariane platform early initialization. + */ +static int ariane_early_init(bool cold_boot) +{ + int rc; + + if (!cold_boot) + return 0; + + rc = uart8250_init(ARIANE_UART_ADDR, + ARIANE_UART_FREQ, + ARIANE_UART_BAUDRATE, + ARIANE_UART_REG_SHIFT, + ARIANE_UART_REG_WIDTH, + ARIANE_UART_REG_OFFSET, + ARIANE_UART_CAPS); + if (rc) + return rc; + + return aclint_mswi_cold_init(&mswi); +} + +/* + * Ariane platform final initialization. + */ +static int ariane_final_init(bool cold_boot) +{ + void *fdt; + + if (!cold_boot) + return 0; + + fdt = fdt_get_address_rw(); + fdt_fixups(fdt); + + return 0; +} + +/* + * Initialize the ariane interrupt controller during cold boot. + */ +static int ariane_irqchip_init(void) +{ + return plic_cold_irqchip_init(&plic); +} + +/* + * Initialize ariane timer during cold boot. + */ +static int ariane_timer_init(void) +{ + return aclint_mtimer_cold_init(&mtimer, NULL); +} + +static int openhwgroup_ariane_platform_init(const void *fdt, int nodeoff, const struct fdt_match *match) +{ + generic_platform_ops.early_init = ariane_early_init; + generic_platform_ops.timer_init = ariane_timer_init; + generic_platform_ops.irqchip_init = ariane_irqchip_init; + generic_platform_ops.final_init = ariane_final_init; + + return 0; +} + +static const struct fdt_match openhwgroup_ariane_match[] = { + { .compatible = "eth,ariane-bare-dev" }, + { }, +}; + +const struct fdt_driver openhwgroup_ariane = { + .match_table = openhwgroup_ariane_match, + .init = openhwgroup_ariane_platform_init, +}; diff --git a/platform/generic/openhwgroup/objects.mk b/platform/generic/openhwgroup/objects.mk index ab6ca79d..2906dd9b 100644 --- a/platform/generic/openhwgroup/objects.mk +++ b/platform/generic/openhwgroup/objects.mk @@ -6,3 +6,6 @@ carray-platform_override_modules-$(CONFIG_PLATFORM_OPENHWGROUP_OPENPITON) += openhwgroup_openpiton platform-objs-$(CONFIG_PLATFORM_OPENHWGROUP_OPENPITON) += openhwgroup/openpiton.o + +carray-platform_override_modules-$(CONFIG_PLATFORM_OPENHWGROUP_ARIANE) += openhwgroup_ariane +platform-objs-$(CONFIG_PLATFORM_OPENHWGROUP_ARIANE) += openhwgroup/ariane.o diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh index 19ae9045..6ea4c9c5 100755 --- a/scripts/create-binary-archive.sh +++ b/scripts/create-binary-archive.sh @@ -101,7 +101,6 @@ build_opensbi() { # Setup 64-bit platform list BUILD_PLATFORM_SUBDIR+=("nuclei/ux600") BUILD_PLATFORM_SUBDIR+=("kendryte/k210") - BUILD_PLATFORM_SUBDIR+=("fpga/ariane") BUILD_PLATFORM_SUBDIR+=("generic") ;; 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