From 0f18b3fe0adda745b3ac80f7b79ce2b8512e2e95 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Thu, 25 Jul 2019 05:05:03 +0000 Subject: lib: Allow compiling without FP support Currently, we mandate 'F' and 'D' extension in riscv_fp.h so that misaligned load/store emulation has access to FP registers. The above is too restrictive and we should certainly allow compilation for soft-FP toolchains and explicit PLATFORM_RISCV_ISA not having 'F' and 'D' extensions. This patch extends riscv_fp.h and misaligned load/store emulation to allow compiling OpenSBI without FP support. Signed-off-by: Anup Patel Reviewed-by: Bin Meng --- include/sbi/riscv_fp.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h index a8d4c510..a685884a 100644 --- a/include/sbi/riscv_fp.h +++ b/include/sbi/riscv_fp.h @@ -73,10 +73,6 @@ #define SET_FS_DIRTY() ((void)0) -#else -#error "Floating point emulation not supported.\n" -#endif - #define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs)) #define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs)) #define GET_F32_RS3(insn, regs) (GET_F32_REG(insn, 27, regs)) @@ -94,3 +90,5 @@ #define GET_F64_RS2S(insn, regs) (GET_F64_REG(RVC_RS2S(insn), 0, regs)) #endif + +#endif -- cgit v1.3.1