From b5ae8e8a650d8cb0134f03f53472fb026d2ee6e6 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 24 Dec 2018 16:49:01 +0530 Subject: lib: Add misaligned load/store trap handling We generally don't get misaligned load/store traps from Linux/U-Boot compiled using GCC 8.2 or higher but this is not true with older GCC toolchains. To tackle this we add misaligned load/store trap handling adopted from BBL sources but much more simpler. (Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git) Signed-off-by: Anup Patel --- include/sbi/sbi_misaligned_ldst.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 include/sbi/sbi_misaligned_ldst.h (limited to 'include') diff --git a/include/sbi/sbi_misaligned_ldst.h b/include/sbi/sbi_misaligned_ldst.h new file mode 100644 index 00000000..16419586 --- /dev/null +++ b/include/sbi/sbi_misaligned_ldst.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2018 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel + * + * SPDX-License-Identifier: BSD-2-Clause + */ + +#ifndef __SBI_MISALIGNED_LDST_H__ +#define __SBI_MISALIGNED_LDST_H__ + +#include + +struct sbi_trap_regs; +struct sbi_scratch; + +int sbi_misaligned_load_handler(u32 hartid, ulong mcause, + struct sbi_trap_regs *regs, + struct sbi_scratch *scratch); + +int sbi_misaligned_store_handler(u32 hartid, ulong mcause, + struct sbi_trap_regs *regs, + struct sbi_scratch *scratch); + +#endif -- cgit v1.3.1