From d8a483fc7fd05f7c72a1690e0db326bd4bcd5514 Mon Sep 17 00:00:00 2001 From: Atish Patra Date: Tue, 19 Nov 2024 11:34:35 -0800 Subject: lib: sbi_pmu: PMU raw event v2 support As per the updated ISA specification and SBI PMU v3.0, lower 56 bits are available for the platform to implement mhpmeventX encoding. Implement the PMU raw event V2 support defined in SBI v3.0 which allows more bits for platforms to encode the raw events. Signed-off-by: Atish Patra Reviewed-by: Anup Patel --- include/sbi/sbi_ecall_interface.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/sbi/sbi_ecall_interface.h b/include/sbi/sbi_ecall_interface.h index 3aa57466..bcb7359f 100644 --- a/include/sbi/sbi_ecall_interface.h +++ b/include/sbi/sbi_ecall_interface.h @@ -245,6 +245,7 @@ enum sbi_pmu_event_type_id { SBI_PMU_EVENT_TYPE_HW = 0x0, SBI_PMU_EVENT_TYPE_HW_CACHE = 0x1, SBI_PMU_EVENT_TYPE_HW_RAW = 0x2, + SBI_PMU_EVENT_TYPE_HW_RAW_V2 = 0x3, SBI_PMU_EVENT_TYPE_FW = 0xf, SBI_PMU_EVENT_TYPE_MAX, }; @@ -261,6 +262,7 @@ enum sbi_pmu_ctr_type { #define SBI_PMU_EVENT_IDX_TYPE_MASK (0xF << SBI_PMU_EVENT_IDX_TYPE_OFFSET) #define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF #define SBI_PMU_EVENT_RAW_IDX 0x20000 +#define SBI_PMU_EVENT_RAW_V2_IDX 0x30000 #define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF -- cgit v1.3.1