From 8ea972838cf3f398b1a2896e645c8c2fb23e2159 Mon Sep 17 00:00:00 2001 From: Vincent Chen Date: Mon, 20 Oct 2025 14:34:05 +0800 Subject: utils: cache: Add SiFive ccache controller SiFive Composable cache is a L3 share cache of the core complex. Add this driver to support the share cache maintenance operations via the MMIO registers. Co-developed-by: Samuel Holland Signed-off-by: Samuel Holland Signed-off-by: Vincent Chen Co-developed-by: Nick Hu Signed-off-by: Nick Hu Reviewed-by: Samuel Holland Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-3-69a132447d8a@sifive.com Signed-off-by: Anup Patel --- lib/utils/cache/objects.mk | 3 +++ 1 file changed, 3 insertions(+) (limited to 'lib/utils/cache/objects.mk') diff --git a/lib/utils/cache/objects.mk b/lib/utils/cache/objects.mk index 2fcf9666..a343eb8c 100644 --- a/lib/utils/cache/objects.mk +++ b/lib/utils/cache/objects.mk @@ -7,4 +7,7 @@ libsbiutils-objs-$(CONFIG_FDT_CACHE) += cache/fdt_cache.o libsbiutils-objs-$(CONFIG_FDT_CACHE) += cache/fdt_cache_drivers.carray.o +carray-fdt_cache_drivers-$(CONFIG_FDT_CACHE_SIFIVE_CCACHE) += fdt_sifive_ccache +libsbiutils-objs-$(CONFIG_FDT_CACHE_SIFIVE_CCACHE) += cache/fdt_sifive_ccache.o + libsbiutils-objs-$(CONFIG_CACHE) += cache/cache.o -- cgit v1.3.1