From cdebae2cc9539e2e0553b9c68eab22997c734cbb Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 11 Dec 2023 14:07:56 +0530 Subject: lib: utils/irqchip: Add shared MMIO region for PLIC in root domain On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel --- platform/template/platform.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'platform/template') diff --git a/platform/template/platform.c b/platform/template/platform.c index 86381ca2..4b3f2acf 100644 --- a/platform/template/platform.c +++ b/platform/template/platform.c @@ -19,6 +19,8 @@ #include #define PLATFORM_PLIC_ADDR 0xc000000 +#define PLATFORM_PLIC_SIZE (0x200000 + \ + (PLATFORM_HART_COUNT * 0x1000)) #define PLATFORM_PLIC_NUM_SOURCES 128 #define PLATFORM_HART_COUNT 4 #define PLATFORM_CLINT_ADDR 0x2000000 @@ -33,6 +35,7 @@ static struct plic_data plic = { .addr = PLATFORM_PLIC_ADDR, + .size = PLATFORM_PLIC_SIZE, .num_src = PLATFORM_PLIC_NUM_SOURCES, }; -- cgit v1.3.1