From ec51e91eaa4e55e6babe0b37387645e75f7ded61 Mon Sep 17 00:00:00 2001 From: Nick Hu Date: Fri, 14 Nov 2025 11:22:46 +0800 Subject: lib: utils/cache: Add SiFive PL2 controller SiFive Private L2(PL2) cache is a private cache owned by each hart. Add this driver to support private cache flush operations via the MMIO registers. Co-developed-by: Eric Lin Signed-off-by: Eric Lin Co-developed-by: Zong Li Signed-off-by: Zong Li Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Co-developed-by: Samuel Holland Signed-off-by: Samuel Holland Signed-off-by: Nick Hu Reviewed-by: Anup Patel Link: https://lore.kernel.org/r/20251114-sifive-cache-drivers-v1-2-8423a721924c@sifive.com Signed-off-by: Anup Patel --- platform/generic/configs/defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'platform') diff --git a/platform/generic/configs/defconfig b/platform/generic/configs/defconfig index 3896b0e0..1bb14c78 100644 --- a/platform/generic/configs/defconfig +++ b/platform/generic/configs/defconfig @@ -13,6 +13,7 @@ CONFIG_PLATFORM_MIPS_P8700=y CONFIG_PLATFORM_SPACEMIT_K1=y CONFIG_FDT_CACHE=y CONFIG_FDT_CACHE_SIFIVE_CCACHE=y +CONFIG_FDT_CACHE_SIFIVE_PL2=y CONFIG_FDT_CPPC=y CONFIG_FDT_CPPC_RPMI=y CONFIG_FDT_GPIO=y -- cgit v1.3.1