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<title>rt-thread.git/.github/workflows/utest_auto_run.yml, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/.github/workflows/utest_auto_run.yml?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/.github/workflows/utest_auto_run.yml?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2026-10-17T01:44:26Z</updated>
<entry>
<title>[ARCH/RISC-V] Next RISC-V (#10320)</title>
<updated>2026-10-17T01:44:26Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2026-10-17T01:44:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=8d8dc96b67eee53af2841a8819364d52fbec39cb'/>
<id>urn:sha1:8d8dc96b67eee53af2841a8819364d52fbec39cb</id>
<content type='text'>
* [libcpu][risc-v] Refactor the RISC-V architecture port

Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration.

- use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection
- unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling
- add PLIC, CLIC, ACLINT, APLIC and IMSIC support
- map physical hart IDs to contiguous logical CPU IDs
- add T-Head vendor overrides while preserving legacy ports
- migrate qemu-virt64-riscv with RV32 and RV64 support
- update clock_time, MM, LWP, OFW, PCI and Rust integration

Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [libcpu][risc-v] skip disabled CPU nodes in early FDT walk

Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child
without checking status, so disabled cores still joined hart registration
and MMU capability probing. Skip nodes that are not okay/ok via
rt_fdt_device_is_available() before reading reg or mmu-type.

Signed-off-by: seteiro &lt;chenmoushun@163.com&gt;

* [libcpu][risc-v] Fix per-CPU page table mapping

- reuse existing non-leaf page table entries when mapping per-CPU areas
- reject leaf entry conflicts instead of overwriting mappings

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
Signed-off-by: seteiro &lt;chenmoushun@163.com&gt;
Co-authored-by: seteiro &lt;chenmoushun@163.com&gt;</content>
</entry>
<entry>
<title>[fix][libc] fix timegm month overflow calculation</title>
<updated>2026-08-21T01:44:42Z</updated>
<author>
<name>Hui Su</name>
<email>3164683437@qq.com</email>
</author>
<published>2026-08-18T11:34:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=339bffb702b911b55b0e6d54fa5ad9116295f048'/>
<id>urn:sha1:339bffb702b911b55b0e6d54fa5ad9116295f048</id>
<content type='text'>
The original overflow logic used __spm[tm_mon] as the current month's
length when normalizing tm_mday. This produced incorrect dates after
crossing month boundaries and left zero or negative days unnormalized.

Use the difference between adjacent cumulative day offsets with
leap-year handling. Normalize overflow in tm_sec, tm_min, tm_hour,
tm_mday, and tm_mon to keep the affected broken-down fields normalized.

Add regression tests for month boundaries, leap years, large offsets,
zero and negative days, negative time fields, combined overflow, and
boundary carry cases.

Close #11686

Signed-off-by: Hui Su &lt;3164683437@qq.com&gt;
</content>
</entry>
<entry>
<title>ci: detect qemu utest assertions</title>
<updated>2026-06-26T07:42:14Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-06-26T05:15:02Z</published>
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<id>urn:sha1:c374e529c4e04b31cb4505f57f7abd217e6b62ae</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][qemu-virt64-aarch64] add DM config and docs</title>
<updated>2026-06-15T02:00:57Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2026-06-10T15:52:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ea5a974305739cd0daaca89ba8f2fa3563b47c3f'/>
<id>urn:sha1:ea5a974305739cd0daaca89ba8f2fa3563b47c3f</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>utest: move ci configs to github directory</title>
<updated>2026-06-12T06:22:53Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-06-11T07:53:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=38c5ff0e56ba624562ec1e6b6fedb03b28c0b029'/>
<id>urn:sha1:38c5ff0e56ba624562ec1e6b6fedb03b28c0b029</id>
<content type='text'>
Signed-off-by: CYFS &lt;2805686936@qq.com&gt;
</content>
</entry>
<entry>
<title>[bsp][zynqmp-a53-dfzu2eg] enable full dm</title>
<updated>2026-06-08T06:57:37Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2026-03-06T13:10:56Z</published>
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<id>urn:sha1:63965cb103e5dcc6fe253579a063019542bdb35c</id>
<content type='text'>
This is a builtin fdt example BSP

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[ci]: restrict utest workflow triggers</title>
<updated>2026-05-06T10:00:00Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-05-06T09:47:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=b943c0d9f6fe169919501e1c57752951e736ff15'/>
<id>urn:sha1:b943c0d9f6fe169919501e1c57752951e736ff15</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[action][utest]:Expand kernel auto-run matrix and sync test configs</title>
<updated>2026-04-19T12:37:38Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-04-17T07:32:45Z</published>
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<id>urn:sha1:ae5b5ed1821b7a9ddcafa024856252fd724634f4</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[action]Add automatic testing for SMP.</title>
<updated>2025-12-04T07:53:07Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2025-11-18T03:55:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=35816c14b748f7b86f7752e2f1d2f09fbf8d6920'/>
<id>urn:sha1:35816c14b748f7b86f7752e2f1d2f09fbf8d6920</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[ci]: disable the post-ci-status enabling option for regarding the relevant CI</title>
<updated>2025-11-04T03:16:13Z</updated>
<author>
<name>kurisaw</name>
<email>2053731441@qq.com</email>
</author>
<published>2025-11-04T03:10:00Z</published>
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<id>urn:sha1:fa6f86eda3f9ca8794764853dbadef76ffb3e523</id>
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</content>
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