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<title>rt-thread.git/.github, branch v5.0.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/.github?h=v5.0.x</id>
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<updated>2023-03-27T02:17:57Z</updated>
<entry>
<title>[bsp][stm32] add stm32h750-fk750m1-vbt6 bsp</title>
<updated>2023-03-27T02:17:57Z</updated>
<author>
<name>NU-LL</name>
<email>1125934312@qq.com</email>
</author>
<published>2023-03-25T11:28:21Z</published>
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<id>urn:sha1:735fb14fe7461bcd2d3d0baa876fd1efbdbd0208</id>
<content type='text'>
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</entry>
<entry>
<title>[bsp]add bl808 uart2 driver &amp;&amp; add bl60x/bl70x bsp to ci-action (#7097)</title>
<updated>2023-03-25T11:05:33Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-03-25T11:05:33Z</published>
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<id>urn:sha1:575abd58ff26dd0ddea3af8c86a5b19e05a9b502</id>
<content type='text'>
* update bl_mcu_sdk SConscript &amp;&amp; add bl808 uart2 driver

* add bl60x/bl70x bsp to ci-action</content>
</entry>
<entry>
<title>[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)</title>
<updated>2023-03-23T12:06:50Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-23T12:06:50Z</published>
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<id>urn:sha1:de4f23748212dbba7d0250fdac3ae583e74fcbed</id>
<content type='text'>
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;</content>
</entry>
<entry>
<title>[GD32]add gd32470z-lckfb (#7022)</title>
<updated>2023-03-11T04:21:31Z</updated>
<author>
<name>yuanzihao</name>
<email>y@yzh.email</email>
</author>
<published>2023-03-11T04:21:31Z</published>
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<id>urn:sha1:23786ee481698063b64d8dff37c7ac6e4351e406</id>
<content type='text'>
* --复制gd32450z-eval 作为立创梁山派 gd32470z-lckfb的模板进行移植
* -修改模板keil工程的配置，IROM需要注意总共为1024k，分为Code  area 和Data area  ，IRAM1为 ： 512K-64K=448K=458752=0x70000。
-重新用ENV生成编译固件
片上SRAM可分为4块，分别为SRAM0（112KB）、SRAM1（16KB）、SRAM2（64KB）和TCMSRAM（64KB）。SRAM0、SRAM1和SRAM2可以被所有的AHB主机访问，然而，TCMSRAM（紧耦合存储器SRAM）只可被Cortex ® -M4内核的数据总线访问。BKPSRAM（备份SRAM）应用于备份域，即使当VDD供电电源掉电时，该SRAM仍可保持其内容。附加SRAM（ADDSRAM）只在一些特殊的GD32F4xx器件中可用。由于采用AHB互联矩阵，上述SRAM块可以同时被不同的AHB主机访问，例如，即使CPU正在访问SRAM0，USBHS也可以访问SRAM1。

* -修改IAR编译的链接脚本
* --修改Flash和RAM大小
-RAM大小为448k是因为512K-64K=448K，其中后面的64K为TCMSRAM（紧耦合存储器SRAM）只可被Cortex ® -M4内核的数据总线访问，先不要乱分配
* -修改MDK链接脚本
* -修改board.h
* -修改MCU型号
* -Finsh控制台和LED1闪灯程序工作正常，串口控制台名称错误，从uart改为uart0
-Scons正常生成工程
* -发现GD32固件库当前没有240Mhz的时钟配置，将固件库升级为GD32F4xx_Firmware_Library_V3.0.3-发布时间为2023-01-04
* -修改bsp/gd32/arm/gd32407v-start/board/SConscript文件
* -修改led1和change logs
* -按照提交规范使能 One ELF Section per Function（MDK） 并用scons重新生成工程
* -发现整个GD32的IAR模板工程template.eww 是没有的，所以当前是不支持IAR开发的，需要后面学习一下IAR使用再实现了。
* -使用formatting源码格式化工具跑一边gd32470z-lckfb目录
* -使用formatting源码格式化工具跑一遍[components/net/netdev/src/netdev.c]
-三个月前的提交多了几个空格</content>
</entry>
<entry>
<title>新增stm32f401-weact-blackpill BSP（STM32F401CCU6最小系统板） (#6973)</title>
<updated>2023-03-06T02:09:03Z</updated>
<author>
<name>Misthao</name>
<email>71510503+ZangCHSHub@users.noreply.github.com</email>
</author>
<published>2023-03-06T02:09:03Z</published>
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<id>urn:sha1:fab0e506bed244228e4e7f3d8dbeb471557d97c4</id>
<content type='text'>
* 新增stm32f401-weact-blackpill
</content>
</entry>
<entry>
<title>[bsp][lpc55sxx] add CPU define for S06/S16/S29/S36 make GCC comiple pass</title>
<updated>2023-03-03T03:13:22Z</updated>
<author>
<name>杨熙</name>
<email>yandld@hipnuc.com</email>
</author>
<published>2023-03-03T03:13:22Z</published>
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<id>urn:sha1:b7c2d1ba42267820ed6f82384367e5981cdb3b33</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[STM32]Add STM32F723E-DISCO bsp support</title>
<updated>2023-03-01T13:23:35Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2023-03-01T08:58:18Z</published>
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<id>urn:sha1:00ad3921e419e36070d2d3e41e491cdb80156d28</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[ci]add aarch64 smart ci</title>
<updated>2023-02-13T02:56:17Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-02-09T08:45:26Z</published>
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<id>urn:sha1:b32eae36d3aca5eb72aafbb7ab2341dae85e55cf</id>
<content type='text'>
</content>
</entry>
<entry>
<title>add rt-smart risv64 ci</title>
<updated>2023-02-13T02:56:17Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-02-09T06:58:28Z</published>
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<id>urn:sha1:1c46f2f68613f76e45ded4206a4b0fa227c84b3b</id>
<content type='text'>
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</entry>
<entry>
<title>[ci] utest add --strict</title>
<updated>2023-02-13T02:56:17Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-02-09T06:06:26Z</published>
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<id>urn:sha1:aa83f64ef205f601378c4cadf4dfabb40fe3c77e</id>
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