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<title>rt-thread.git/bsp/ESP/libraries/drivers/drv_spi.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/ESP/libraries/drivers/drv_spi.c?h=master</id>
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<updated>2026-10-22T07:42:35Z</updated>
<entry>
<title>[bsp][esp32] adapt C3/C6 to ESP-IDF v6.1 and bump RISC-V toolchain to gcc 15.2 (#11870)</title>
<updated>2026-10-22T07:42:35Z</updated>
<author>
<name>Chen Moushun</name>
<email>cms19859230182@gmail.com</email>
</author>
<published>2026-10-22T07:42:35Z</published>
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<id>urn:sha1:dff75f072fe2b047325a312d6b944dd3acce8676</id>
<content type='text'>
* [bsp][esp32] adapt C3/C6 to ESP-IDF v6.1 and bump RISC-V toolchain to gcc 15.2

- Adapt ESP32-C3/C6 BSP to ESP-IDF v6.1; bump RISC-V toolchain to gcc 15.2
- C6: re-enable SPI with board-local drv_spi.c; add devices.spi to CI
  attachconfig; drop shared drv_spi.c spi_command_t hack
- C6: fix ADC oneshot multi-channel unit handle and mutex
- C3: fix portTRY_ENTER_CRITICAL_SAFE expansion in portmacro.h
- Compat with RT-Thread-packages/esp-idf rtt-dev used by CI: map
  SYSTIMER_* to SYSTIMER_LL_* (C3 and C6 board.c), accept uart_periph.h
  from hal/ or soc/
- Fix clang-format and cppcheck issues in the compat code

Signed-off-by: seteiro &lt;chenmoushun@163.com&gt;
Co-Authored-By: Grok &lt;seteiro@mail.grokbot.com&gt;

* ci: retrigger after esp-idf#18 merged

* bsp: ESP: fix C6 ADC for IDF 6.1 (adc_ll bus clock)

Replace removed PERIPH_SARADC_MODULE with adc_ll_enable_bus_clock /
adc_ll_reset_register when ESP_IDF_VERSION &gt;= 6.0.0.

---------

Signed-off-by: seteiro &lt;chenmoushun@163.com&gt;
Co-authored-by: Grok &lt;seteiro@mail.grokbot.com&gt;</content>
</entry>
<entry>
<title>[bsp][esp32-c6] address review: chunk SPI xfers to 64B limit, BSP-owned gdma.c, early width check</title>
<updated>2026-10-16T03:31:50Z</updated>
<author>
<name>seteiro</name>
<email>276597748+cms19859230182-lang@users.noreply.github.com</email>
</author>
<published>2026-10-15T16:54:01Z</published>
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<id>urn:sha1:338eb83718e2202d151d6fd0488ad0593beddb2a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][esp32-c6] drop the null SPI configure call</title>
<updated>2026-10-16T03:31:50Z</updated>
<author>
<name>seteiro</name>
<email>276597748+cms19859230182-lang@users.noreply.github.com</email>
</author>
<published>2026-09-29T14:10:03Z</published>
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<id>urn:sha1:1f747c967cbdf159a443f8f46e1a98416201a7bc</id>
<content type='text'>
cppcheck follows spi_configure(NULL, NULL) into a dereference. clang-format also wants the macro backslashes left-aligned and a single space around the enum equals.
</content>
</entry>
<entry>
<title>[bsp][esp32-c6] compile SPI when it is selected</title>
<updated>2026-10-16T03:31:50Z</updated>
<author>
<name>seteiro</name>
<email>276597748+cms19859230182-lang@users.noreply.github.com</email>
</author>
<published>2026-09-29T12:31:48Z</published>
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<id>urn:sha1:95cb4c26e0b483a55d560a05970f291e58fec2d8</id>
<content type='text'>
Selecting BSP_USING_SPI on C6 links the IDF SPI master. The default image still leaves SPI off, and the peripheral table stays unsupported.
</content>
</entry>
<entry>
<title>[bsp][esp32]: reorganize ESP32C3 BSP layout</title>
<updated>2026-05-26T14:16:11Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-05-26T10:42:11Z</published>
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