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<title>rt-thread.git/bsp/bouffalo_lab/README.md, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-01-31T09:44:27Z</updated>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
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<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>[bsp]add bl808 wifi driver (#8294)</title>
<updated>2023-11-25T14:54:24Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-11-25T14:54:24Z</published>
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<id>urn:sha1:50f521b5283a5ac01b03bfc640e92d848d37bd58</id>
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</content>
</entry>
<entry>
<title>add bl808-d0 spi &amp;&amp; i2c</title>
<updated>2023-06-30T13:00:18Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-06-29T22:50:24Z</published>
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<id>urn:sha1:2d087c04a4899bc73cae25c5afe0a6d42bb8681b</id>
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</content>
</entry>
<entry>
<title>[bsp/bouffalo_lab]add sdcard driver (#7577)</title>
<updated>2023-05-29T01:47:25Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-05-29T01:47:25Z</published>
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<id>urn:sha1:8e4a8404e3f09faf9433e9a6112c5b8f60800e0f</id>
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</entry>
<entry>
<title>[bsp/bouffalo_lab]add spi driver (#7435)</title>
<updated>2023-05-04T03:49:38Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-05-04T03:49:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=6edd0586f23a2088dacfc34c5d514d0c0c7f2915'/>
<id>urn:sha1:6edd0586f23a2088dacfc34c5d514d0c0c7f2915</id>
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</entry>
<entry>
<title>[HUST CSE] fix: Fixed wrong download link of env in 20+ files. (#7296)</title>
<updated>2023-04-18T13:18:56Z</updated>
<author>
<name>Hornos Lee</name>
<email>u202012078@hust.edu.cn</email>
</author>
<published>2023-04-18T13:18:56Z</published>
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<id>urn:sha1:4f1a50be242f51bc0c7afd0d6926d4571b765a54</id>
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</entry>
<entry>
<title>[bsp] add bl808 lp core (#7069)</title>
<updated>2023-03-19T15:16:12Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-03-19T15:16:12Z</published>
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<id>urn:sha1:a538b268588ae668ff897c3719b6a7eef9ac8c0a</id>
<content type='text'>
* Add riscv_32e support

* add bl808 lp core

* update README.md</content>
</entry>
<entry>
<title>add bl60x/bl70x/bl61x/bl808 (#7063)</title>
<updated>2023-03-19T06:41:18Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-03-19T06:41:18Z</published>
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<id>urn:sha1:c11f5bb2510c9c961819c554c1e4cc69f7f52ab7</id>
<content type='text'>
Co-authored-by: flyingcys &lt;flyingcys!163.com&gt;</content>
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