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<title>rt-thread.git/bsp/core-v-mcu, branch v5.0.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/core-v-mcu?h=v5.0.x</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/bsp/core-v-mcu?h=v5.0.x'/>
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<updated>2023-03-31T08:49:48Z</updated>
<entry>
<title>sync and update all projects (#7138)</title>
<updated>2023-03-31T08:49:48Z</updated>
<author>
<name>yangjie11</name>
<email>39754270+yangjie11@users.noreply.github.com</email>
</author>
<published>2023-03-31T08:49:48Z</published>
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<id>urn:sha1:95e6b69b8e56f86ac8a6d6718a16d255527e87cf</id>
<content type='text'>
* sync and update</content>
</entry>
<entry>
<title>[libcpu/risc-v]将cv32e40p文件夹中文件移至BSP (#7002)</title>
<updated>2023-03-02T02:34:35Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-02T02:34:35Z</published>
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<id>urn:sha1:892ef3dc5bcb6e504629513b57ec4e1023a0d9d1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][riscv]整合libcpu/riscv中的移植文件 提供一份公共代码于common (#6941)</title>
<updated>2023-03-01T06:32:43Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-01T06:32:43Z</published>
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<id>urn:sha1:b9e4fcfc6878aa05cca277ea3557299e59207965</id>
<content type='text'>
整合libcpu/riscv中的移植文件 提供一份公共代码于common

在提交本pr时，除hpmicro的内核，rv32内核bsp已完成去除大部分的冗余，大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件，从而提供一份公用代码，新移植的RV32内核的BSP可以全部使用common代码。

- 在common中提供一份公用文件：interrupt_gcc.S
- 修改原有的文件，将原有的中断中上下文切换代码替换为interrupt_gcc.S
- 基于上述修改，修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等)
- 在common中提供一份公用文件：trap_common.c；提供统一中断入口函数，中断入口函数初始化，中断入口注册等函数，并完善异常时的信息输出

- 在common中提供一份公用文件：rt_hw_stack_frame.h；将栈帧结构体剥离，供用户使用

- 在上述工作完成后，在上述工作的基础上测试仓库中risc-v内核的BSP

- 完善函数中的命名，完善中断栈的获取

- 提供一份详细的基于现有common文件的移植指南

  #### 在什么测试环境下测试通过 

- 1.CH32V307V-R1-R0
- 2.CH32V208W-R0-1V4
- 3.HPM6750EVKMINI
- 4.GD32VF103V-EVAL
- 5.qemu(CORE-V-MCU )

&gt; 与上述开发板使用同样芯片的BSP均测试通过

在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试，测试过程系统运行正常。</content>
</entry>
<entry>
<title>modify RT_ALIGN_SIZE as 8 by default</title>
<updated>2023-01-13T03:47:23Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-01-12T04:25:57Z</published>
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<id>urn:sha1:ddccef3a64f1dc477134d4ff73117a653955a5eb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>format Kconfig and sconscript</title>
<updated>2023-01-09T03:52:13Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-01-09T02:14:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9bc68d26a446158aad13f910fa5a2b8b09febec1'/>
<id>urn:sha1:9bc68d26a446158aad13f910fa5a2b8b09febec1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][riscv]移除cv32e40p中部分文件，采用common中的文件</title>
<updated>2023-01-02T21:42:18Z</updated>
<author>
<name>Yaochenger</name>
<email>1516081466@qq.com</email>
</author>
<published>2022-12-30T06:51:02Z</published>
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<id>urn:sha1:f2a66e122fbd702941d0a3c6fef92af605eb4b6e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][core-v-mcu]在驱动中添加rtconfig.h，以兼容原工程基于FreeRTOS的驱动</title>
<updated>2022-12-19T23:25:04Z</updated>
<author>
<name>Yaochenger</name>
<email>1516081466@qq.com</email>
</author>
<published>2022-12-19T06:09:54Z</published>
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<id>urn:sha1:8ade08799bba360116200899f92415f9db545120</id>
<content type='text'>
</content>
</entry>
<entry>
<title>更新readme</title>
<updated>2022-12-19T04:37:54Z</updated>
<author>
<name>Yaochenger</name>
<email>1516081466@qq.com</email>
</author>
<published>2022-12-19T02:08:16Z</published>
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<id>urn:sha1:b256411736057ce91787c3605648bfd616045e38</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][core-v-mcu]修改后兼容原有CLI,兼容原有FreeRTOS函数接口 (#6747)</title>
<updated>2022-12-16T09:56:13Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2022-12-16T09:56:13Z</published>
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<id>urn:sha1:3ea5166376dbc05722d793c3183c15b3a01e7f3a</id>
<content type='text'>
* [bsp][core-v-mcu]兼容原有FreeRTOS函数接口，兼容CLI</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
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<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
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