<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/bsp/cvitek/c906_little/Kconfig, branch copilot/remove-vbus-code-implementation</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/cvitek/c906_little/Kconfig?h=copilot%2Fremove-vbus-code-implementation</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/bsp/cvitek/c906_little/Kconfig?h=copilot%2Fremove-vbus-code-implementation'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2025-01-16T01:05:52Z</updated>
<entry>
<title>[bsp][cvitek] add cache opration functions for cache coherence</title>
<updated>2025-01-16T01:05:52Z</updated>
<author>
<name>imcu</name>
<email>ign7798540@gmail.com</email>
</author>
<published>2024-11-26T06:54:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=6cbb2c3ee59c8f46528df89225cf3aa235d46884'/>
<id>urn:sha1:6cbb2c3ee59c8f46528df89225cf3aa235d46884</id>
<content type='text'>
By default, the small core enables D-Cache without ensuring cache
coherence. Therefore, when using shared memory, inconsistencies can
occur in the data read by the small core and the big core.

Solution: Migrate cache-related functions from the official
duo-buildroot-sdk library to implement cache-related operations in
rthw.h. This allows you to either disable D-Cache or call the
flush_dcache_range function before reading and after writing for
synchronization.

It is recommended to use the flush_dcache_range function, as disabling
D-Cache can have a significant performance impact.

Signed-off-by: zdtyuiop4444 &lt;ign7798540@gmail.com&gt;
</content>
</entry>
<entry>
<title>bsp: cvitek: remove support for spinor/spinand</title>
<updated>2025-01-08T22:54:14Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-01-08T02:59:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=2322f0154ecc0736e75750af74d403ca76b17576'/>
<id>urn:sha1:2322f0154ecc0736e75750af74d403ca76b17576</id>
<content type='text'>
Confirmed with milkv, only the sd card version is sold
by default for duo in the market. The spi pins are
provided through stamp holes, so that users can solder
the corresponding components on their baseboard during
secondary development.

In order to simplify maintenance work, the mainline
will only support the sd-card version and no longer
support spinor/spinand.

Updated config files the same in this patch.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>bsp: cvitek: Add support for duos_sd</title>
<updated>2024-08-27T04:53:15Z</updated>
<author>
<name>Shicheng Chu</name>
<email>1468559561@qq.com</email>
</author>
<published>2024-08-27T02:17:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=66738d71daf8fbe126d71eda55cfd269b0b88d12'/>
<id>urn:sha1:66738d71daf8fbe126d71eda55cfd269b0b88d12</id>
<content type='text'>
Supports both big and little cores of RISC-V C906,
but does not support ARM cores. Currently, only UART
drivers are supported on the peripherals.

Signed-off-by: Shicheng Chu &lt;1468559561@qq.com&gt;
</content>
</entry>
<entry>
<title>bsp: cvitek: Canonically rename some macro definitions</title>
<updated>2024-08-20T01:52:18Z</updated>
<author>
<name>Z8MAN8</name>
<email>1468559561@qq.com</email>
</author>
<published>2024-08-18T08:24:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f5156774b2b7bc73278d602dd027ac4d61349e3f'/>
<id>urn:sha1:f5156774b2b7bc73278d602dd027ac4d61349e3f</id>
<content type='text'>
Analysis: Some macro definition names are not standardized
and lack prefixes.

Solution: Add BSP_ prefix to GPIO_IRQ_BASE SYS_GPIO_IRQ_BASE
PLIC_PHY_ADDR TIMER_CLK_FREQ UART_IRQ_BASE I2C_IRQ_BASE.

Signed-off-by: Shicheng Chu &lt;1468559561@qq.com&gt;
</content>
</entry>
<entry>
<title>bsp: cvitek: fix c906_little  IRQ_MAX_NR error num</title>
<updated>2024-08-07T03:35:27Z</updated>
<author>
<name>Z8MAN8</name>
<email>1468559561@qq.com</email>
</author>
<published>2024-08-06T14:37:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=b6c26d45378889eddb2573bbcc9b985d2ec5719d'/>
<id>urn:sha1:b6c26d45378889eddb2573bbcc9b985d2ec5719d</id>
<content type='text'>
Analysis: The IRQ_MAX_NR value of c906_little is wrong.
interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but
does not explicitly include this header file.

Solution: Change IRQ_MAX_NR to the correct value 61 in
the datasheet. Explicitly include rtconfig.h in interrupt.h.

Signed-off-by: Shicheng Chu &lt;1468559561@qq.com&gt;
Reviewed-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句</title>
<updated>2024-06-20T06:40:42Z</updated>
<author>
<name>latercomer</name>
<email>latercomer@qq.com</email>
</author>
<published>2024-06-11T04:16:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=fe3c4d456ede444582c22e285596dd61293b5773'/>
<id>urn:sha1:fe3c4d456ede444582c22e285596dd61293b5773</id>
<content type='text'>
</content>
</entry>
<entry>
<title>update gpio driver</title>
<updated>2024-05-27T03:26:09Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2024-05-23T16:13:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=09a0e4c5f83fab24348e95d52fba7180a82abe12'/>
<id>urn:sha1:09a0e4c5f83fab24348e95d52fba7180a82abe12</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Accumulated patchsets for bsp/cvitek (#8968)</title>
<updated>2024-05-22T00:19:07Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2024-05-22T00:19:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=5dd3b7427a6a0b1f474e98159cfca15c36893810'/>
<id>urn:sha1:5dd3b7427a6a0b1f474e98159cfca15c36893810</id>
<content type='text'>
* bsp: cvitek: kconfig: add wdt for cv18xx_riscv

Add Watchdog timer in Kconfig.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* drv: cvitek: remove using macro from source file

Building of source file should be controlled by SConscript,
but not in source file itself.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp: cvitek: kconfig: add i2c for cv18xx_riscv

Add I2C in Kconfig for c906B.

Note, the IRQ# is different from that of c906L.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp: cvitek: kconfig: add rtc for cv18xx_riscv

Add RTC in Kconfig for c906B.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp: cvitek: fix channel issue for pwm driver

The original code confuses the concepts of controllers and channels.
Fixed it and do some code cleanup.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp:cvitek: add i2c pinmux config for cv18xx_riscv

Pinmux in driver code is controlled by SOC type, bcos driver
code should be general and support all pins defined by SoC.

Pinmux configuration in Kconfig is controlled by BOARD type,
bcos when we operate on board, it does not expose all chip-level
pin signals and we can only use part of them.

Following is I2C signals exported by duo family. Details see
https://milkv.io/docs/duo/overview.

Note: we have not added support for duo-S.

Duo
===

NAME    I2C         CV1800B/GPIO    &lt;PINNAME&gt;__&lt;FUNCNAME&gt;
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo 256m
========

NAME    I2C         CV1800B/GPIO    &lt;PINNAME&gt;__&lt;FUNCNAME&gt;
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S
=====

NAME    I2C         CV1800B/GPIO    &lt;PINNAME&gt;__&lt;FUNCNAME&gt;
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
Signed-off-by: flyingcys &lt;flyingcys@163.com&gt;

* bsp:cvitek: remove using macro from source file for i2c

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp:cvitek: unify menu message text for i2c as other drivers

Other dirvers has no extra word "HW".

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp:cvitek: add i2c pinmux config for c906_little

Porting what we have done in commit "bsp:cvitek: add i2c pinmux config
for cv18xx_riscv" to c906_little.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

---------

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
Signed-off-by: flyingcys &lt;flyingcys@163.com&gt;
Co-authored-by: flyingcys &lt;flyingcys@163.com&gt;</content>
</entry>
<entry>
<title>support cvitek bsp spinor flash</title>
<updated>2024-04-09T22:09:54Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2024-04-09T14:48:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=62cd7ad961151975fdd5159ebc4fb8af781238b0'/>
<id>urn:sha1:62cd7ad961151975fdd5159ebc4fb8af781238b0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>support cv181x c906_little (#8680)</title>
<updated>2024-03-28T15:35:54Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2024-03-28T15:35:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=40e26f4909fa61ada775ba86b44d8300aaf5d250'/>
<id>urn:sha1:40e26f4909fa61ada775ba86b44d8300aaf5d250</id>
<content type='text'>
</content>
</entry>
</feed>
