rt-thread.git/bsp/cvitek/c906_little/board, branch copilot/remove-vbus-code-implementation

bsp: cvitek: c906_littel: fixed build warnings for board.c

2025-01-30T01:28:38Z

When building bsp/cvitek/c906_little, compiler warns: ``` board/board.c: In function 'rt_hw_board_init': board/board.c:26:5: warning: implicit declaration of function 'rt_hw_tick_init'; did you mean 'rt_hw_stack_init'? [-Wimplicit-function-declaration] 26 | rt_hw_tick_init(); | ^~~~~~~~~~~~~~~ | rt_hw_stack_init board/board.c:29:5: warning: implicit declaration of function 'rt_hw_uart_init'; did you mean 'rt_hw_board_init'? [-Wimplicit-function-declaration] 29 | rt_hw_uart_init(); | ^~~~~~~~~~~~~~~ | rt_hw_board_init ``` To remove these build warnings, include header files which declare these functions. Plus, remove the decalartion of `tick_isr()`, this function does not exist. Signed-off-by: Chen Wang

[bsp][cvitek] fix c906_little build warning in cache.c

2025-01-20T06:26:50Z

build warning: passing argument 1 of 'inv_icache_range' makes integer from pointer without a cast [-Wint-conversion] Analyze: The passed parameter type is void*, which is a pointer type, but the required type is uintptr_t, which is an integer type. Therefore, there will be a 'makes integer from pointer without a cast' warning. Solution: casting the void* pointer to uintptr_t, ensure that the function receives the correct type. Signed-off-by: zdtyuiop4444

[bsp][cvitek] add cache opration functions for cache coherence

2025-01-16T01:05:52Z

By default, the small core enables D-Cache without ensuring cache coherence. Therefore, when using shared memory, inconsistencies can occur in the data read by the small core and the big core. Solution: Migrate cache-related functions from the official duo-buildroot-sdk library to implement cache-related operations in rthw.h. This allows you to either disable D-Cache or call the flush_dcache_range function before reading and after writing for synchronization. It is recommended to use the flush_dcache_range function, as disabling D-Cache can have a significant performance impact. Signed-off-by: zdtyuiop4444

bsp: cvitek: fix bug in setting PLIC_PRIORITY[n]

2025-01-16T01:03:26Z

description: In the bsp/cvitek/c906_little/board/interrupt.c, There is an issue with setting the PLIC_PRIORITY[n]. analysis: PLIC_PRIORITY[n] each register corresponds to the priority of a hardware interrupt number. Solution: Each register is 4 bytes. Multiply the total number of IRQs by 4 instead of dividing by 4. Signed-off-by: Liu Gui

[bsp][cvitek]fix milkv-duos-sd cann't startup big-core kernel (#9633)

2024-11-15T04:52:57Z

fix milkv-duos-sd cann't startup big-core kernel milkv-duos-sd use cv1813h folder store ld file Signed-off-by: flyingcys

[kernel] Specification interrupt nested level variable declaration type (#9568)

2024-10-23T21:08:29Z

bsp: cvitek: Add timer driver

2024-08-25T16:11:57Z

Signed-off-by: Shicheng Chu <1468559561@qq.com>

bsp: cvitek: Canonically rename some macro definitions

2024-08-20T01:52:18Z

Analysis: Some macro definition names are not standardized and lack prefixes. Solution: Add BSP_ prefix to GPIO_IRQ_BASE SYS_GPIO_IRQ_BASE PLIC_PHY_ADDR TIMER_CLK_FREQ UART_IRQ_BASE I2C_IRQ_BASE. Signed-off-by: Shicheng Chu <1468559561@qq.com>

bsp: cvitek: fix c906_little IRQ_MAX_NR error num

2024-08-07T03:35:27Z

Analysis: The IRQ_MAX_NR value of c906_little is wrong. interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but does not explicitly include this header file. Solution: Change IRQ_MAX_NR to the correct value 61 in the datasheet. Explicitly include rtconfig.h in interrupt.h. Signed-off-by: Shicheng Chu <1468559561@qq.com> Reviewed-by: Chen Wang

bsp:cvitek: add pinmux for adc

2024-07-16T10:29:17Z

Signed-off-by: Chen Wang