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<title>rt-thread.git/bsp/cvitek/c906_little, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/cvitek/c906_little?h=master</id>
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<updated>2026-07-20T05:05:46Z</updated>
<entry>
<title>fix: name anonymous Kconfig choices</title>
<updated>2026-07-20T05:05:46Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-07-01T07:27:44Z</published>
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<id>urn:sha1:25212f374583a6f36133809bdd3b6ae51641d083</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][drivers][soft_i2c] unify the software I2C driver</title>
<updated>2026-07-16T05:19:57Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-07-15T09:54:33Z</published>
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<id>urn:sha1:414ff7f3710168dbf99a398e18b2a4ff8448b005</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[format][version]: synchronize bsp version configuration</title>
<updated>2026-05-08T03:22:12Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-05-08T02:47:41Z</published>
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<id>urn:sha1:4e46e97c18d4cb53b96b57f373137855b641159f</id>
<content type='text'>
</content>
</entry>
<entry>
<title> [bsp][cvitek] fix timer clock frequency for 25MHz crystal</title>
<updated>2026-04-20T12:47:09Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-04-17T03:43:20Z</published>
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<id>urn:sha1:fa0a61c45bbdc8d7a0173069d74fbfab4631c908</id>
<content type='text'>
  Update rt_hw_get_clock_timer_freq() in the c906_little and cv18xx_risc-v BSPs from 245000000 to 25000000.

  The timer clock source uses a 25MHz crystal, so the previous 245MHz setting was incorrect and caused wrong timer frequency reporting.
</content>
</entry>
<entry>
<title>[bsp][cvitek]:fix i2c err and clock_time#11324</title>
<updated>2026-04-15T03:52:39Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-04-15T03:52:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=2aeebc5cbeb845c6222e059b4aaf1d6206e61442'/>
<id>urn:sha1:2aeebc5cbeb845c6222e059b4aaf1d6206e61442</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
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<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>[format][version]: synchronize bsp version configuration</title>
<updated>2025-10-23T14:06:51Z</updated>
<author>
<name>kurisaw</name>
<email>2053731441@qq.com</email>
</author>
<published>2025-10-23T02:42:47Z</published>
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<id>urn:sha1:e2aed47b6c0ef75ead36cae04c4e9afd9d8049aa</id>
<content type='text'>
</content>
</entry>
<entry>
<title>format: update all series of BSP configuration items (#10406)</title>
<updated>2025-06-17T07:42:49Z</updated>
<author>
<name>沐攸</name>
<email>17773439684@163.com</email>
</author>
<published>2025-06-17T07:42:49Z</published>
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<id>urn:sha1:5f9f5222854f394efee2ed0e99484ca4da1ea591</id>
<content type='text'>
</content>
</entry>
<entry>
<title>bsp: cvitek: c906_littel: fixed build warnings for board.c</title>
<updated>2025-01-30T01:28:38Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-01-27T02:43:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=3383352cdc96238b9e967a8ded7189a563359ba6'/>
<id>urn:sha1:3383352cdc96238b9e967a8ded7189a563359ba6</id>
<content type='text'>
When building bsp/cvitek/c906_little, compiler warns:

```
board/board.c: In function 'rt_hw_board_init':
board/board.c:26:5: warning: implicit declaration of
function 'rt_hw_tick_init'; did you mean 'rt_hw_stack_init'?
[-Wimplicit-function-declaration]
   26 |     rt_hw_tick_init();
      |     ^~~~~~~~~~~~~~~
      |     rt_hw_stack_init
board/board.c:29:5: warning: implicit declaration of
function 'rt_hw_uart_init'; did you mean 'rt_hw_board_init'?
[-Wimplicit-function-declaration]
   29 |     rt_hw_uart_init();
      |     ^~~~~~~~~~~~~~~
      |     rt_hw_board_init
```

To remove these build warnings, include header files
which declare these functions.

Plus, remove the decalartion of `tick_isr()`, this
function does not exist.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>bsp: cvitek: use rttpkgtool to replace cvitek_bootloader</title>
<updated>2025-01-26T02:55:44Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-01-16T07:45:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7e0acaa2541f8351744185da1dd8f1ede2067f23'/>
<id>urn:sha1:7e0acaa2541f8351744185da1dd8f1ede2067f23</id>
<content type='text'>
Originally, for riscv big and little cores under bsp/cvitek,
after generating rtthread.bin, the cvitek_bootloader tool
would be used to package it and generate fip.bin and boot.sd
files that can be burned into sdcard. However, the
cvitek_bootloader tool repository is relatively large, and
it compiles and generates firmware such as fsbl, opensbi and
uboot from the source code level. And when using it, it
needs to be downloaded to the bsp/cvitek directory, which
will introduce pollution to source files in the RTT repository
under the original working path.

The new solution uses rttpkgtool, which is similar to
cvitek_bootloader, but it uses prebuilt firmware, so it is
very small and does not introduce pollution to the source file.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
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