rt-thread.git/bsp/cvitek/cv18xx_aarch64/README.md, branch copilot/remove-vbus-code-implementationUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/bsp/cvitek/cv18xx_aarch64/README.md?h=copilot%2Fremove-vbus-code-implementation2025-03-29T00:55:40Zbsp: cvitek: use rttpkgtool for aarch642025-03-29T00:55:40Zjojoandgyc1583267844@qq.com2025-03-27T07:18:56Zurn:sha1:15ef36747760e7f7e6e1e5c3d0a213fa7d956e21
Fixed #9968
1.Using scripts in rttpkgtool to make firmware.
2.Deleted duplicate prebuild files.
3.Modify README.md
Signed-off-by: YunZhan Huang <1583267844@qq.com>
bsp: cvitek: aarch64: add switchto-arm diagram2025-02-27T02:32:55ZChen Wangunicorn_wang@outlook.com2025-02-27T02:27:51Zurn:sha1:58e587bfbca7e8c04b3e32c5a6a6a79e3664d295
In actual operation, we often forget how to connect
the wires, so we just put the schematic diagram in
the readme document for quick recall.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
bsp: cvitek: optimze build operations for aarch642025-01-18T05:42:14ZChen Wangunicorn_wang@outlook.com2025-01-17T07:18:37Zurn:sha1:ab1f4381616bbc233904db9a5fb16fe7e42332ca
For bsp/cvitek, duo256m, the operation process is
slightly different when building images for riscv
and arm64.
To improve the user experience, unify the building
process and steps of the two as follows:
- Enter c906_little and execute `scons`
- Enter cv18xx_riscv/cv18xx_aarch64 and execute `scons`
That's all. Finally, we can get `fip.bin` and
`boot.sd` under `bsp/cvitek/output/milkv-duo256m`.
Update the README.md accordingly.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
bsp/cvitek: print arch info. during boot-up (#9919)2025-01-16T14:33:55ZChen Wangunicorn_wang@outlook.com2025-01-16T14:33:55Zurn:sha1:2b82ab38a20728c8767f80bd10cc2b90da94ccd5
Duo's CPU combination is more complicated:
| BSP | B/L core| ISA | UART |
| ------------- | ------- |---------------- |-------|
| cv18xx_risc-v | Big | RISC-V C906 | UART0 |
| c906-little | Littel | RISC-V C906 | UART1 |
| cv18xx_aarch64| Big | ARM Cortex A53 | UART0 |
Printing ISA and big and small core information
during the boot process helps developers/testers
determine the CPU and serial port corresponding to
the current console.
In addition, the RTT logo printing has already
distinguished whether it is smart, so the bsp
printing no longer distinguishes.
Updated README to sync with this change.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>bsp: cvitek: update README for cv18xx_aarch642024-12-30T03:32:10ZChen Wangunicorn_wang@outlook.com2024-12-25T06:29:53Zurn:sha1:8cf5389f5d0bed830a63ac41fe4934935e8638f0
Re-write README.md for aarch64.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
bsp/cvitek update readme2024-06-26T12:22:05ZLTreeshu49595325+LTreeshu@users.noreply.github.com2024-06-26T12:22:05Zurn:sha1:f687ace6ef1a8a720a30f0bd2e3376dacb4f18a3[bsp][cvitek] Milk-V Duo 256M Supports running ARM large core and RISCV small core2024-04-21T13:52:47ZliYangYang941843540@qq.com2024-04-21T13:52:47Zurn:sha1:f13220d91111bbb48abaae26507917c2fc9c6d12
支持将rtthread.bin和dtb文件合成boot.sd文件，使用uboot直接通过bootcmd命令启动rtthread内核。
支持构建带有小核riscv程序的fip.bin文件，保证在运行arm大核的同时运行小核的riscv程序。[bsp][cvitek] 在Milk-V Duo 256M开发板中支持ARM核运行RT-Thread标准版和Smart版内核 (#8800)2024-04-16T01:49:41ZliYangYang941843540@qq.com2024-04-16T01:49:41Zurn:sha1:9c359fd4c82db644894d7a6e51810e570d5bd6ca
* Supports ARM core of Milk-V Duo 256M development board
* add fip.bin(arm)