rt-thread.git/bsp/cvitek/cv18xx_risc-v/Kconfig, branch copilot/remove-vbus-code-implementation

bsp: cvitek: remove support for spinor/spinand

2025-01-08T22:54:14Z

Confirmed with milkv, only the sd card version is sold by default for duo in the market. The spi pins are provided through stamp holes, so that users can solder the corresponding components on their baseboard during secondary development. In order to simplify maintenance work, the mainline will only support the sd-card version and no longer support spinor/spinand. Updated config files the same in this patch. Signed-off-by: Chen Wang

bsp: cvitek: 906b: romfs -> diskfs

2024-11-27T02:45:00Z

ROMFS is Read-Only Memory Filesystem. But ext4/fat are not read-only. So renamed: - mnt_romfs.c -> mnt_diskfs.c - BSP_ROOTFS_TYPE_ROMFS -> BSP_ROOTFS_TYPE_DISKFS Signed-off-by: Chen Wang

bsp: cvitek: Add support for duos_sd

2024-08-27T04:53:15Z

Supports both big and little cores of RISC-V C906, but does not support ARM cores. Currently, only UART drivers are supported on the peripherals. Signed-off-by: Shicheng Chu <1468559561@qq.com>

rename c906 FPU macro (#9290)

2024-08-27T04:46:41Z

1. 修改 ENABLE_FPU 为 ARCH_RISCV_FPU，与libcpu/common 保持统一 2. 对 bsp/cvitek/cv18xx_risc-v 中增加使能 ARCH_RISCV_FPU 的动作。解决了 issue #9075

bsp: cvitek: Canonically rename some macro definitions

2024-08-20T01:52:18Z

Analysis: Some macro definition names are not standardized and lack prefixes. Solution: Add BSP_ prefix to GPIO_IRQ_BASE SYS_GPIO_IRQ_BASE PLIC_PHY_ADDR TIMER_CLK_FREQ UART_IRQ_BASE I2C_IRQ_BASE. Signed-off-by: Shicheng Chu <1468559561@qq.com>

bsp: cvitek: fix cv18xx_risc-v IRQ_MAX_NR error num

2024-08-07T03:35:27Z

Analysis: The IRQ_MAX_NR value of cv18xx_risc-v is wrong. The wrong IRQ_MAX_NR will cause the install of an interrupt number larger than its value to fail. Solution: Change IRQ_MAX_NR to the correct value 101 in the datasheet. Signed-off-by: Shicheng Chu <1468559561@qq.com> Reviewed-by: Chen Wang

bsp: enable KERNEL_REMAP for cvitek platform

2024-07-29T12:18:19Z

Changes: - board.c: add static assert for KERNEL_VADDR_START to check if it's valid - board.h: updated deafult KERNEL_VADDR_START for standard version - config bsp for v5.2.0 smart requirements - kconfig: update bsp Kconfig for remap kernel Signed-off-by: Shell Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229 Reviewed-by: Chen Wang

bsp: cvitek/c906B: feat: add config of bootfs

2024-07-29T12:16:54Z

To support more choice on bootfs. romfs, cromfs are now supported on risc_v_big platform. Changes: - added mount operations under port - added prototypes for cromfs init APIs Signed-off-by: Shell Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229 Reviewed-by: Chen Wang

[libcpu/rv64] feat: unify tick.c

2024-07-15T04:06:39Z

The changes unify the tick.c implementations for all risc-v64 architectures, leveraging the CPUTIME feature. This refactoring was necessary to streamline the codebase, and ensure consistent timer handling across different platforms. Changes: - Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues. - Updated .config for BSPs to update `CPUTIME_TIMER_FREQ` - Updated header of for API `riscv_cputime_init` - Initialized riscv timer on `rt_hw_tick_init` - Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`: - Replaced direct use of `rdtime` with `clock_cpu_gettime`. - Removed redundant timer frequency definitions. - Added static assertions to check the value of `CPUTIME_TIMER_FREQ`. - Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`. - Integrated `ktime` support for tick initialization. Signed-off-by: Shell Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164 Reviewed-by: Chen Wang

bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句

2024-06-20T06:40:42Z