rt-thread.git/bsp/cvitek/cv18xx_risc-v/applications, branch copilot/remove-vbus-code-implementation

bsp/cvitek: print arch info. during boot-up (#9919)

2025-01-16T14:33:55Z

Duo's CPU combination is more complicated: | BSP | B/L core| ISA | UART | | ------------- | ------- |---------------- |-------| | cv18xx_risc-v | Big | RISC-V C906 | UART0 | | c906-little | Littel | RISC-V C906 | UART1 | | cv18xx_aarch64| Big | ARM Cortex A53 | UART0 | Printing ISA and big and small core information during the boot process helps developers/testers determine the CPU and serial port corresponding to the current console. In addition, the RTT logo printing has already distinguished whether it is smart, so the bsp printing no longer distinguishes. Updated README to sync with this change. Signed-off-by: Chen Wang

bsp: cvitek: remove support for spinor/spinand

2025-01-08T22:54:14Z

Confirmed with milkv, only the sd card version is sold by default for duo in the market. The spi pins are provided through stamp holes, so that users can solder the corresponding components on their baseboard during secondary development. In order to simplify maintenance work, the mainline will only support the sd-card version and no longer support spinor/spinand. Updated config files the same in this patch. Signed-off-by: Chen Wang

bsp: cvitek: Add support for duos_sd

2024-08-27T04:53:15Z

Supports both big and little cores of RISC-V C906, but does not support ARM cores. Currently, only UART drivers are supported on the peripherals. Signed-off-by: Shicheng Chu <1468559561@qq.com>

[device] add dev_ prefix for file names

2024-08-23T22:15:09Z

[bsp/cvitek]update gpio driver (#8946)

2024-05-13T22:20:57Z

update gpio driver

[bsp/cvitek]update cv18xx series README.md

2024-04-07T16:35:53Z

update cv18xx series README.md

support cv181x-riscv for RT-SMART (#8724)

2024-04-02T23:37:45Z