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<title>rt-thread.git/bsp/cvitek/cv18xx_risc-v/rtconfig.h, branch copilot/remove-vbus-code-implementation</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/cvitek/cv18xx_risc-v/rtconfig.h?h=copilot%2Fremove-vbus-code-implementation</id>
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<updated>2025-10-23T14:06:51Z</updated>
<entry>
<title>[format][version]: synchronize bsp version configuration</title>
<updated>2025-10-23T14:06:51Z</updated>
<author>
<name>kurisaw</name>
<email>2053731441@qq.com</email>
</author>
<published>2025-10-23T02:42:47Z</published>
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<id>urn:sha1:e2aed47b6c0ef75ead36cae04c4e9afd9d8049aa</id>
<content type='text'>
</content>
</entry>
<entry>
<title>bsp/cvitek: Increase the value of RT_NAME_MAX</title>
<updated>2025-09-25T05:03:00Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-09-25T02:27:07Z</published>
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<id>urn:sha1:ef354df2e34bd1d3f0654a8cf433127bef9b94dd</id>
<content type='text'>
Otherwise report runtime error:
[E/kernel.obj] Object name sys workq exceeds RT_NAME_MAX=8, consider increasing RT_NAME_MAX.
(obj_name_len &lt;= RT_NAME_MAX - 1) assertion failed at function:rt_object_allocate, line number:520

Increase the value of RT_NAME_MAX to 16 for c906B.
The value of RT_NAME_MAX for BSP of C906L and ARM core already meet
the requirement of more than 8.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>format: update all series of BSP configuration items (#10406)</title>
<updated>2025-06-17T07:42:49Z</updated>
<author>
<name>沐攸</name>
<email>17773439684@163.com</email>
</author>
<published>2025-06-17T07:42:49Z</published>
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<id>urn:sha1:5f9f5222854f394efee2ed0e99484ca4da1ea591</id>
<content type='text'>
</content>
</entry>
<entry>
<title>bsp: cvitek: riscv: use marco for linker script</title>
<updated>2025-04-22T01:48:53Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-04-18T04:02:59Z</published>
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<id>urn:sha1:e7d870bb7112fa7feee5927debee9ef2cdd2026b</id>
<content type='text'>
Regarding link script, some memory offsets and sizes are different
between the standard version and the smart version (such as
"__STACKSIZE__", kernel start address, kernel memory size, etc.).
Original solution is replacing link scripts and use INCLUDE,
which is relatively complicated.

This improvement uses macros to replace constants in the link
script. The preprocessing mechanism provided by gcc is used
to dynamically replace constant values during the build process.

In addition, the kernel load address (the corresponding
KERNEL_VADDR_START for smart) was originally configured as
0xFFFFFFC000200000, which is default value of riscv with
kernelmap enabled (0xffffffc000000000) plus offset to skip over
bootloader (0x200000). This caused a trouble: due to
default bsp configuration is for smart, if we switched to the
standard version and build, and then switched back to the smart
version, the value of KERNEL_VADDR_START will be default back to
0xffffffc000000000, which is different from the original configuration
value, resulting in the need to manually reconfigure it, which
is easy to forget and cause problems.

The current solution is to use the default value
0xffffffc000000000 in the configuration. Add offset to the code
and link script when using it.

This patch update the default .config and rtconfig.h for cv18xx_riscv.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>修复 MMCSD 宏拼写错误+内核开启LOG_D编译问题</title>
<updated>2025-03-12T08:02:43Z</updated>
<author>
<name>yixinghua121</name>
<email>111113527+yixinghua121@users.noreply.github.com</email>
</author>
<published>2025-03-12T08:02:43Z</published>
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<id>urn:sha1:983f02151af42c5ef8ac5718bda0cf39795652a9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>bsp: cvitek: remove support for spinor/spinand</title>
<updated>2025-01-08T22:54:14Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-01-08T02:59:11Z</published>
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<id>urn:sha1:2322f0154ecc0736e75750af74d403ca76b17576</id>
<content type='text'>
Confirmed with milkv, only the sd card version is sold
by default for duo in the market. The spi pins are
provided through stamp holes, so that users can solder
the corresponding components on their baseboard during
secondary development.

In order to simplify maintenance work, the mainline
will only support the sd-card version and no longer
support spinor/spinand.

Updated config files the same in this patch.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>bsp: cvitek: 906b: romfs -&gt; diskfs</title>
<updated>2024-11-27T02:45:00Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2024-11-26T01:23:01Z</published>
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<id>urn:sha1:1052f99537c31c38dc1aad39cec3d8fd38a06a2c</id>
<content type='text'>
ROMFS is Read-Only Memory Filesystem. But ext4/fat are not read-only.

So renamed:
- mnt_romfs.c -&gt; mnt_diskfs.c
- BSP_ROOTFS_TYPE_ROMFS -&gt; BSP_ROOTFS_TYPE_DISKFS

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;
</content>
</entry>
<entry>
<title>support milkv-duo rt-smart</title>
<updated>2024-11-25T02:48:36Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2024-11-13T15:23:38Z</published>
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<id>urn:sha1:8ed4ae144fda951d7a3f5ffbfbf810b1ce1bf2c8</id>
<content type='text'>
1. switches memory management to SLA

2. use ioremap modification driver

Signed-off-by: flyingcys flyingcys@163.com
</content>
</entry>
<entry>
<title>[klibc] add rt_vsnprintf_std.c and rename RT_KLIBC_USING_VSNPRINTF_LONGLONG</title>
<updated>2024-11-24T03:29:28Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2024-11-20T00:42:41Z</published>
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<id>urn:sha1:8e10983c9b0dc5b634a06496e9a435049206cea2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>rename c906 FPU macro (#9290)</title>
<updated>2024-08-27T04:46:41Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2024-08-27T04:46:41Z</published>
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<id>urn:sha1:82f30aa54f67b3be6acadfbd34f68d2971606055</id>
<content type='text'>
1. 修改 ENABLE_FPU 为 ARCH_RISCV_FPU，与libcpu/common 保持统一
2. 对 bsp/cvitek/cv18xx_risc-v 中增加使能 ARCH_RISCV_FPU 的动作。解决了 issue #9075 </content>
</entry>
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