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<title>rt-thread.git/bsp/gd32/arm/libraries/gd32_drivers/SConscript, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/gd32/arm/libraries/gd32_drivers/SConscript?h=master</id>
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<updated>2026-01-31T09:44:27Z</updated>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=743b614875fc33257be47ab53b6c5e040ec27893'/>
<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>[gd32/arm][drivers]: general GD serial driver adapter</title>
<updated>2025-11-26T13:42:29Z</updated>
<author>
<name>kurisaw</name>
<email>2053731441@qq.com</email>
</author>
<published>2025-11-14T02:44:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=98b9ecdba69727462ae69a4909cd2e43d3047f36'/>
<id>urn:sha1:98b9ecdba69727462ae69a4909cd2e43d3047f36</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat[driver][gd32]: Improve the RTC driver and support alarm interrupts</title>
<updated>2025-10-10T02:54:53Z</updated>
<author>
<name>Yuqiang Wang</name>
<email>yifang.wangyq@foxmail.com</email>
</author>
<published>2025-10-10T01:59:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=4f7bc8c4c0f00b2c7ccccbb42a54b939662a74ed'/>
<id>urn:sha1:4f7bc8c4c0f00b2c7ccccbb42a54b939662a74ed</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/gd32] 移除BSP软件I2C相关配置，软件I2C以集成至I2C设备驱动框架</title>
<updated>2025-08-29T02:35:44Z</updated>
<author>
<name>MuChenger</name>
<email>ws1516081466@gmail.com</email>
</author>
<published>2025-08-29T02:27:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=5b88f59d34c85c6a4e5c20531f72f8518a631ddf'/>
<id>urn:sha1:5b88f59d34c85c6a4e5c20531f72f8518a631ddf</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/gd32] update gd32 i2c driver #10641</title>
<updated>2025-08-28T10:16:37Z</updated>
<author>
<name>WangShun</name>
<email>ws1516081466@gmail.com</email>
</author>
<published>2025-08-28T10:16:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=6a9d218e920921a953c9f3b2490372a73a9387f0'/>
<id>urn:sha1:6a9d218e920921a953c9f3b2490372a73a9387f0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat(gd32 driver) Add support for hardware i2c with gd32e230</title>
<updated>2025-08-15T00:32:03Z</updated>
<author>
<name>Huang YunKun</name>
<email>htynkn@gmail.com</email>
</author>
<published>2025-08-15T00:32:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=235bbef52356eb20a6a6e5ecc1039b8f07ae681d'/>
<id>urn:sha1:235bbef52356eb20a6a6e5ecc1039b8f07ae681d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>GD32: add CAN driver for GD32F4xx (#10152)</title>
<updated>2025-03-27T15:17:45Z</updated>
<author>
<name>Dmitriy</name>
<email>dmitry.tchernoff2012@yandex.ru</email>
</author>
<published>2025-03-27T15:17:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=59a690addc62e67f90fab539120962c06f09d299'/>
<id>urn:sha1:59a690addc62e67f90fab539120962c06f09d299</id>
<content type='text'>
* GD32: add CAN driver for GD32F4xx

* Removed extra spaces

* Add attachconfig.yml, edit CAN0 GPIO

* Changed attachconfig.yml

* Fixed config defines names</content>
</entry>
<entry>
<title>[bsp][gd32][drivers] add serial v2 and dma driver support</title>
<updated>2024-03-21T01:19:26Z</updated>
<author>
<name>Evlers</name>
<email>35098087+Evlers@users.noreply.github.com</email>
</author>
<published>2024-03-21T01:19:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e25f287ff30f7bcf3fd8a30cba6c56ae86504c83'/>
<id>urn:sha1:e25f287ff30f7bcf3fd8a30cba6c56ae86504c83</id>
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</content>
</entry>
<entry>
<title>[bsp][gd32]添加 立创开发板 GD32F470 的 SDRAM驱动，从STM32的drv_sdram.c修改而来</title>
<updated>2023-08-21T03:47:59Z</updated>
<author>
<name>yuanzihao</name>
<email>y@yzh.email</email>
</author>
<published>2023-08-20T14:06:26Z</published>
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<id>urn:sha1:5b36522b485aa07302851d7ceb9dcfd26cfc0209</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][gd32]添加 GD32F303 的 pwm 驱动</title>
<updated>2023-06-07T01:06:43Z</updated>
<author>
<name>ZengJianwei</name>
<email>583823429@qq.com</email>
</author>
<published>2023-06-05T10:52:36Z</published>
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<id>urn:sha1:ab8caed1a38e3693824c3d7c97947041b064bdae</id>
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</content>
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