Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/bsp/nxp/mcx/mcxn/Libraries/drivers?h=copilot%2Ffix-format-string-injection 2026-02-10T03:39:19Z 2026-02-10T03:39:19Z Rbb666 64397326+Rbb666@users.noreply.github.com 2026-02-10T03:16:11Z urn:sha1:c2103a5cc9e7771d07bf202ed4a20de0556445b5 This reverts commit 1bcd5c8f163baf1d86c42dfa29cfa170ef5592cf. 2026-02-10T02:18:45Z vandoul vandoul@ticks.cn 2026-02-10T02:18:45Z urn:sha1:1bcd5c8f163baf1d86c42dfa29cfa170ef5592cf 2026-01-31T09:44:27Z Bernard Xiong bernard.xiong@gmail.com 2026-01-31T09:44:27Z urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893 * [components][clock_time] Refactor time subsystem around clock_time Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals. Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional. Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer. * [components][clock_time] Use BSP-provided clock timer frequency on riscv64 * [risc-v] Use runtime clock timer frequency for tick and delays * [bsp] Add clock timer frequency hooks for riscv64 boards * [bsp] Update Renesas RA driver doc clock_timer link * [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh * [bsp][rk3500] Update rk3500 clock configuration * [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays * [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci * [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings. * [bsp][raspi3] select clock time for systimer * [bsp][hpm5300evk] Trim trailing blank line * [bsp][hpm5301evklite] Trim trailing blank line * [bsp][hpm5e00evk] Trim trailing blank line * [bsp][hpm6200evk] Trim trailing blank line * [bsp][hpm6300evk] Trim trailing blank line * [bsp][hpm6750evk] Trim trailing blank line * [bsp][hpm6750evk2] Trim trailing blank line * [bsp][hpm6750evkmini] Trim trailing blank line * [bsp][hpm6800evk] Trim trailing blank line * [bsp][hpm6e00evk] Trim trailing blank line * [bsp][nxp] switch lpc178x to gcc and remove mcx timer source * [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue. * [docs][clock_time] add clock time documentation * [docs][clock_time] Update clock time subsystem documentation - Update device driver index to use correct page reference - Clarify upper layer responsibilities in architecture overview - Update README to describe POSIX/libc, Soft RTC, and device driver usage - Refine architecture diagram with improved layout and color scheme - Remove obsolete clock_timer.md file * [kernel][utest] Trim trailing space * [clock_time] Fix hrtimer wrap handling * [clock_time] fix the static rt_inline issue * [clock_time] fix the rt_clock_hrtimer_control result issue 2024-08-27T04:44:34Z yandld 1453363089@qq.com 2024-08-26T03:40:35Z urn:sha1:32635bb53a69d19cb4ca3e0b516b353661c675c3 2024-08-27T04:44:34Z yandld alex.yang@nxp.com 2024-08-13T03:48:41Z urn:sha1:0179d7427ac256d6ef6aa544356898406bc16778 add uart5 add can support add wdog support 2024-08-27T04:44:34Z yandld alex.yang@nxp.com 2024-08-09T09:11:17Z urn:sha1:6ef77d7d32f65e86d4f81a7bd34732d338999eea 2024-08-19T08:04:28Z Yilin Sun imi415@imi.moe 2024-08-19T03:40:25Z urn:sha1:a5780a341cb54539600452d520632227b2a2f164 Signed-off-by: Yilin Sun <imi415@imi.moe> 2024-08-16T08:47:16Z Yilin Sun imi415@imi.moe 2024-08-16T08:47:16Z urn:sha1:08644569479b2e0183803f863a6babec02e80bb7 * bsp: nxp/mcx/mcxn: SPI: Added missing bracket and re-format code. The closing bracket is missing from SPI6 struct. Introduced since commit fc1cfd6d3627ba8460d514e7913bd307e8b1d567 . Use standard rt_spi_device->cs_pin instead of user_data pointer. --------- Signed-off-by: Yilin Sun <imi415@imi.moe> 2024-06-25T17:20:59Z hengchuan.qi hengchuan.qi@semidrive.com 2024-06-25T08:00:59Z urn:sha1:8524781cb31c2e8f6b26f13d5a4766d536381ecb 2024-04-12T10:35:31Z Abner 1310125025@qq.com 2024-04-12T09:18:42Z urn:sha1:98c6a741c52730cce106c2aa56aef924c78d3907