rt-thread.git/bsp/qemu-virt64-riscv, branch master

[ARCH/RISC-V] Next RISC-V (#10320)

2026-10-17T01:44:26Z

* [libcpu][risc-v] Refactor the RISC-V architecture port Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration. - use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection - unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling - add PLIC, CLIC, ACLINT, APLIC and IMSIC support - map physical hart IDs to contiguous logical CPU IDs - add T-Head vendor overrides while preserving legacy ports - migrate qemu-virt64-riscv with RV32 and RV64 support - update clock_time, MM, LWP, OFW, PCI and Rust integration Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON. Signed-off-by: GuEe-GUI <2991707448@qq.com> * [libcpu][risc-v] skip disabled CPU nodes in early FDT walk Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child without checking status, so disabled cores still joined hart registration and MMU capability probing. Skip nodes that are not okay/ok via rt_fdt_device_is_available() before reading reg or mmu-type. Signed-off-by: seteiro * [libcpu][risc-v] Fix per-CPU page table mapping - reuse existing non-leaf page table entries when mapping per-CPU areas - reject leaf entry conflicts instead of overwriting mappings Signed-off-by: GuEe-GUI <2991707448@qq.com> --------- Signed-off-by: GuEe-GUI <2991707448@qq.com> Signed-off-by: seteiro Co-authored-by: seteiro

[risc-v][vector] Restore vstart after vector configuration

2026-10-14T01:13:49Z

fix: name anonymous Kconfig choices

2026-07-20T05:05:46Z

[dm][virtio] support virtio dm

2026-06-15T02:00:57Z

1. version for v1.2 2. support packed queue 1. support MMIO/PCI over bus 2. new virtio queue api with dma/cpu sync 3. update for virtio device drivers: - net - block - console - input - gpu 4. new virtio device drivers: - 9p - crypto - rng - scmi - scsi Signed-off-by: GuEe-GUI <2991707448@qq.com>

[format][version]: synchronize bsp version configuration

2026-05-08T03:22:12Z

[components][clock_time] Refactor time subsystem around clock_time (#11111)

2026-01-31T09:44:27Z

* [components][clock_time] Refactor time subsystem around clock_time Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals. Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional. Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer. * [components][clock_time] Use BSP-provided clock timer frequency on riscv64 * [risc-v] Use runtime clock timer frequency for tick and delays * [bsp] Add clock timer frequency hooks for riscv64 boards * [bsp] Update Renesas RA driver doc clock_timer link * [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh * [bsp][rk3500] Update rk3500 clock configuration * [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays * [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci * [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings. * [bsp][raspi3] select clock time for systimer * [bsp][hpm5300evk] Trim trailing blank line * [bsp][hpm5301evklite] Trim trailing blank line * [bsp][hpm5e00evk] Trim trailing blank line * [bsp][hpm6200evk] Trim trailing blank line * [bsp][hpm6300evk] Trim trailing blank line * [bsp][hpm6750evk] Trim trailing blank line * [bsp][hpm6750evk2] Trim trailing blank line * [bsp][hpm6750evkmini] Trim trailing blank line * [bsp][hpm6800evk] Trim trailing blank line * [bsp][hpm6e00evk] Trim trailing blank line * [bsp][nxp] switch lpc178x to gcc and remove mcx timer source * [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue. * [docs][clock_time] add clock time documentation * [docs][clock_time] Update clock time subsystem documentation - Update device driver index to use correct page reference - Clarify upper layer responsibilities in architecture overview - Update README to describe POSIX/libc, Soft RTC, and device driver usage - Refine architecture diagram with improved layout and color scheme - Remove obsolete clock_timer.md file * [kernel][utest] Trim trailing space * [clock_time] Fix hrtimer wrap handling * [clock_time] fix the static rt_inline issue * [clock_time] fix the rt_clock_hrtimer_control result issue

[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscv

2025-12-04T07:42:09Z

1.Add the necessary function declarations for SMP enablement and implement the corresponding functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable, rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock, rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority, rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler. 2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S, add a call to rt_cpus_lock_status_restore to update the scheduler information. 3.If the MMU is enabled, use the .percpu section and record different hartids by configuring special page tables; if the MMU is not enabled, record them directly in the satp register. Additionally, add dynamic startup based on core configuration.The .percpu section is only used when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space waste since no macro guard is added for it in the link script currently. 4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the original +256MB to +128MB. Modify the SConscript file under the common64 directory to include common/atomic_riscv.c in the compilation process. Signed-off-by: Mengchen Teng

[format][version]: synchronize bsp version configuration

2025-10-23T14:06:51Z

bsp/qemu-virt64-riscv: disable RT_USING_UTEST

2025-09-22T09:41:06Z

utest framework is an optional module and should be enabled when running utest. So RT_USING_UTEST should not be enabled by default. Disable it now. Signed-off-by: Chen Wang

format: update all series of BSP configuration items (#10406)

2025-06-17T07:42:49Z