rt-thread.git/bsp/qemu-virt64-riscv, branch serialX-devUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/bsp/qemu-virt64-riscv?h=serialX-dev2023-02-14T15:08:32Z[rt-smart] PV_OFFSET as a variable (#6904)2023-02-14T15:08:32ZShellwangxiaoyao@rt-thread.com2023-02-14T15:08:32Zurn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02
* [rt-smart/mem] remove pv_offset
* [rt-smart] list kernel space command
* [rt-smart] restore ioremap region
* [revert] restore kernel space isolation
* [rt-smart/pv_off] code format
* [rt-smart] add get_pvoff()
* [pvoffset] pvoff as constant for C codes
* [pvoff] pvoff as interfaces[BSP] Add color build for qemu gcc config. (#6924)2023-02-11T09:14:55ZBernard Xiongbernard.xiong@gmail.com2023-02-11T09:14:55Zurn:sha1:e4edf7e1824b45199cbca95303fc262d207dc8f6Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901)2023-02-05T17:11:04ZBernard Xiongbernard.xiong@gmail.com2023-02-05T17:11:04Zurn:sha1:98e0c58527664ae645920729663f0bead1b3dc3f
* Add ADT Kconfig and fix MMU kconfig issue in Cortex-A
* [BSP] enable ADT[rt-smart] porting c906 and D1s to mm (#6848)2023-01-16T00:24:03ZShellwangxiaoyao@rt-thread.com2023-01-16T00:24:03Zurn:sha1:f0dadcb3c390e60463afa5892d2d65e6033d82c8
* [rv64/bsp] porting to mm
* [mm] report more info for debugging
* [fix] code format
* [libcpu/c906] porting to RTOS
* [fix] using rtdbg api
* [fix] add return
* [fix] report more information for debugging
* [fix] use assert 0 for unrecoverable errorformat link scripts2023-01-09T03:52:13ZMeco Man920369182@qq.com2023-01-09T02:16:47Zurn:sha1:592284c66c8a93270cb77cb2a0afb36b64d2bc51format Kconfig and sconscript2023-01-09T03:52:13ZMeco Man920369182@qq.com2023-01-09T02:14:23Zurn:sha1:9bc68d26a446158aad13f910fa5a2b8b09febec1[rt-smart] kernel virtual memory management layer (#6809)2023-01-09T02:08:55ZShellwangxiaoyao@rt-thread.com2023-01-09T02:08:55Zurn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)2022-12-16T10:38:28Zguoguozhanxin@rt-thread.com2022-12-16T10:38:28Zurn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7
* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.[rtdef] use lower-case to define attributes (#6728)2022-12-11T18:12:03ZMan, Jianting (Meco)920369182@qq.com2022-12-11T18:12:03Zurn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b
* [rtdef] rename RT_WEAK attribute as rt_weak
* [rtdef] rename RT_USED attribute as rt_used
* [rtdef] rename RT_SECTION attribute as rt_section
* [rtdef] rename ALIGN attribute as rt_align
* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support[smart][risc-v/libcpu] port rv64 cpu code (#6704)2022-12-10T14:16:42ZShellmaschareno@outlook.com2022-12-10T14:16:42Zurn:sha1:e991be9c51c54883b56ee3d9e7f30db33c404192
* [risc-v/libcpu] porting Smart & RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef