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<title>rt-thread.git/bsp/qemu-virt64-riscv, branch v5.0.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/qemu-virt64-riscv?h=v5.0.2</id>
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<updated>2023-10-08T03:21:00Z</updated>
<entry>
<title>[project] update mdk/iar project and config.</title>
<updated>2023-10-08T03:21:00Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-10-08T03:01:28Z</published>
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<id>urn:sha1:9e79333512c445a5202dc040176036bca8e7f8ad</id>
<content type='text'>
</content>
</entry>
<entry>
<title>修复 qemu 挂载 elm 文件系统失败</title>
<updated>2023-09-26T05:23:48Z</updated>
<author>
<name>zhkag</name>
<email>zhkag@foxmail.com</email>
</author>
<published>2023-09-26T02:22:35Z</published>
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<id>urn:sha1:29a508222c5c49bd48b45a952e51691b14b4263d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[time]时钟框架重构 (#7794)</title>
<updated>2023-07-17T12:11:58Z</updated>
<author>
<name>xqyjlj</name>
<email>xqyjlj@126.com</email>
</author>
<published>2023-07-17T12:11:58Z</published>
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<id>urn:sha1:0eb75ced70a514051fcc6a8f1d232e195b15b4a0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Drivers: Support Open Firmware API and model of PIC</title>
<updated>2023-07-05T08:45:16Z</updated>
<author>
<name>wusongjie</name>
<email>wusongjie@rt-thread.com</email>
</author>
<published>2023-07-05T05:50:18Z</published>
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<id>urn:sha1:8aa4366cb2910c2c61729608d9f2a90868d16deb</id>
<content type='text'>
We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.

Signed-off-by: GuEe-GUI &lt;GuEe-GUI@github.com&gt;
</content>
</entry>
<entry>
<title>sync and update all projects (#7138)</title>
<updated>2023-03-31T08:49:48Z</updated>
<author>
<name>yangjie11</name>
<email>39754270+yangjie11@users.noreply.github.com</email>
</author>
<published>2023-03-31T08:49:48Z</published>
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<id>urn:sha1:95e6b69b8e56f86ac8a6d6718a16d255527e87cf</id>
<content type='text'>
* sync and update</content>
</entry>
<entry>
<title>[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)</title>
<updated>2023-03-23T12:06:50Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-23T12:06:50Z</published>
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<id>urn:sha1:de4f23748212dbba7d0250fdac3ae583e74fcbed</id>
<content type='text'>
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;</content>
</entry>
<entry>
<title>[rt-smart] PV_OFFSET as a variable (#6904)</title>
<updated>2023-02-14T15:08:32Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-14T15:08:32Z</published>
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<id>urn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02</id>
<content type='text'>
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces</content>
</entry>
<entry>
<title>[BSP] Add color build for qemu gcc config. (#6924)</title>
<updated>2023-02-11T09:14:55Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2023-02-11T09:14:55Z</published>
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<id>urn:sha1:e4edf7e1824b45199cbca95303fc262d207dc8f6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901)</title>
<updated>2023-02-05T17:11:04Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2023-02-05T17:11:04Z</published>
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<id>urn:sha1:98e0c58527664ae645920729663f0bead1b3dc3f</id>
<content type='text'>
* Add ADT Kconfig and fix MMU kconfig issue in Cortex-A

* [BSP] enable ADT</content>
</entry>
<entry>
<title>[rt-smart] porting c906 and D1s to mm (#6848)</title>
<updated>2023-01-16T00:24:03Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-16T00:24:03Z</published>
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<id>urn:sha1:f0dadcb3c390e60463afa5892d2d65e6033d82c8</id>
<content type='text'>
* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error</content>
</entry>
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