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<title>rt-thread.git/bsp/renesas, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/renesas?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/bsp/renesas?h=master'/>
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<updated>2026-10-14T01:44:44Z</updated>
<entry>
<title>Change the main thread stack size to 4096</title>
<updated>2026-10-14T01:44:44Z</updated>
<author>
<name>rcitach</name>
<email>yearsince@yeah.net</email>
</author>
<published>2026-10-12T02:34:07Z</published>
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<id>urn:sha1:8c46c09478d34cad416756e7ec9393a1bfba12be</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Optimize System Resource Allocation for ra6w1</title>
<updated>2026-10-14T01:44:44Z</updated>
<author>
<name>rcitach</name>
<email>yearsince@yeah.net</email>
</author>
<published>2026-09-21T10:11:46Z</published>
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<id>urn:sha1:6f6dc98475a10c24efdbad2fcaaee6303d61aa13</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components][libc] run .init_array constructors in cplusplus_system_init</title>
<updated>2026-10-11T08:11:07Z</updated>
<author>
<name>seteiro</name>
<email>chenmoushun@163.com</email>
</author>
<published>2026-10-10T12:34:34Z</published>
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<id>urn:sha1:3577e7a6ed0f183534e207179de5251e155fd49e</id>
<content type='text'>
Newer GCC emits C++ global constructors into .init_array, which many
linker scripts keep outside [__ctors_start__, __ctors_end__), so they
never ran. Walk __init_array_start/__init_array_end (weak) as well,
skipping entries already covered by the ctors range.

Add RT_USING_CPP_CRT_INIT for ports whose startup runtime already runs
.init_array, default on for the simulator. With it set, only the
.init_array walk is skipped; the ctors range is still walked.

Renesas RA/RA_WIRELESS/RZ families select it when C++ is enabled: FSP
SystemInit() already walks .init_array, so boards whose linker script
only provides __init_array_* would run constructors twice. Boards that
fold .init_array into the ctors range (ra6m3-hmi-board, ra8d1, rz)
still run them once via RT-Thread.

Also source env.sh and restore RTT_EXEC_PATH in ToolsCI project generate
and dist steps so scons is on PATH (exit 127) and the ARM toolchain path
is not overwritten by env.sh.

Fixes #11778
</content>
</entry>
<entry>
<title>style: format code with clang-format [skip ci]</title>
<updated>2026-09-10T08:23:49Z</updated>
<author>
<name>CYFS3</name>
<email>128660807+CYFS3@users.noreply.github.com</email>
</author>
<published>2026-09-10T02:31:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=5b8e188af2a5e5aa280db13d23dbe1a9eab8b188'/>
<id>urn:sha1:5b8e188af2a5e5aa280db13d23dbe1a9eab8b188</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/renesas][drivers] Fix SCI SPI runtime configuration and transfer errors</title>
<updated>2026-09-10T08:23:49Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-09-09T09:21:48Z</published>
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<id>urn:sha1:8f8eb450149f745769b7f44aa82da4b3536c229f</id>
<content type='text'>
修复 SCI SPI 分频参数和运行时配置生命周期，保持位宽单位一致，应用模式及片选配置，并在收发超时或错误后停止传输、清理状态。
</content>
</entry>
<entry>
<title>[bsp/renesas][drivers] Read PWM settings from GPT registers</title>
<updated>2026-09-09T02:33:04Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-08-26T02:27:33Z</published>
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<id>urn:sha1:d7ea2bce99c4dc1e63b28638674e1b94d1791417</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/renesas][drivers] Support configurable CAN FD operation</title>
<updated>2026-09-01T01:16:54Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-08-25T07:39:43Z</published>
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<id>urn:sha1:7a2af55ffb3632b73ebfc29f01bf9889ed9d1979</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[BSP][Renesas] Trigger SDHI card detection on R7FA8M85</title>
<updated>2026-08-27T03:48:49Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-08-26T07:28:17Z</published>
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<id>urn:sha1:5abbbec42022a9a28f060a7fc29d68d1f71e2d3f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/renesas][drivers] Fix SPI runtime configuration</title>
<updated>2026-08-27T01:01:32Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-08-24T09:58:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=69c26789fdec08180960e4091e5d9f9803b75948'/>
<id>urn:sha1:69c26789fdec08180960e4091e5d9f9803b75948</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/renesas][drivers] Skip invalid chip select writes in SCI SPI</title>
<updated>2026-08-27T01:01:32Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-08-24T09:52:54Z</published>
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