rt-thread.git/bsp/rm48x50/application/startup.c, branch serialX-dev Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/bsp/rm48x50/application/startup.c?h=serialX-dev 2022-01-05T15:11:58Z add RT_USING_POSIX_STDIO 2022-01-05T15:11:58Z Meco Man 920369182@qq.com 2022-01-02T22:51:44Z urn:sha1:918ee6147c6a415cfd4544ea439a8ab894e2e1ee 对finsh_set_device调用增加宏定义限制 2021-11-24T13:57:12Z Meco Man 920369182@qq.com 2021-11-24T13:57:12Z urn:sha1:bd80b7a4a15a2e97b13bbda69af8e909be544100 [bsp]update GPL license to Apache-2.0, and format files 2021-04-09T02:52:34Z yangjie yangjiexaut@126.com 2021-04-09T02:52:34Z urn:sha1:75e4c9dd0a065f8a5a548a4f557277a48d6e3c24 【优化】在代码中移除 rt_system_object_init/rt_system_tick_init 的调用。 2020-11-23T03:39:38Z guozhanxin guozhanxin@rt-thread.com 2020-11-23T03:36:04Z urn:sha1:a22decb71ba92fdd879914be50809c97f0defb07 rm48x50: add GCC support 2013-10-20T10:51:45Z Grissiom chaos.proton@gmail.com 2013-10-19T20:06:56Z urn:sha1:9568669109ffcb3aa6de8d07959795de71d505ae rm48x50: fix the prototype of finsh_system_init 2013-10-19T13:10:49Z Grissiom chaos.proton@gmail.com 2013-10-19T13:10:49Z urn:sha1:6bcf1bc48bc114023380503f285fe296787848be RM48 does not have cache implemented 2013-06-12T15:48:29Z Grissiom chaos.proton@gmail.com 2013-06-12T15:48:29Z urn:sha1:2df7fc310f29927d0184947c07deab0030bc880e rm48x50: add finsh support 2013-05-29T15:39:09Z Grissiom chaos.proton@gmail.com 2013-05-29T15:39:09Z urn:sha1:4d40978a70158f9906cbef4c0249554ff8d92ce8 add rm48x50 bsp and libcpu 2013-05-24T14:55:13Z Grissiom chaos.proton@gmail.com 2013-05-24T02:04:51Z urn:sha1:f51bce3fedcb5aa64514a4259068d85e8c534ab5 We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.