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<title>rt-thread.git/bsp/rockchip/rk3568/rtconfig.h, branch serialX-dev</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/rockchip/rk3568/rtconfig.h?h=serialX-dev</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/bsp/rockchip/rk3568/rtconfig.h?h=serialX-dev'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2023-02-05T17:11:04Z</updated>
<entry>
<title>Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901)</title>
<updated>2023-02-05T17:11:04Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2023-02-05T17:11:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=98e0c58527664ae645920729663f0bead1b3dc3f'/>
<id>urn:sha1:98e0c58527664ae645920729663f0bead1b3dc3f</id>
<content type='text'>
* Add ADT Kconfig and fix MMU kconfig issue in Cortex-A

* [BSP] enable ADT</content>
</entry>
<entry>
<title>modify RT_ALIGN_SIZE as 8 by default</title>
<updated>2023-01-13T03:47:23Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-01-12T04:25:57Z</published>
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<id>urn:sha1:ddccef3a64f1dc477134d4ff73117a653955a5eb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7450ef6c4d71f992444d27f4a26c16f813ed8e55'/>
<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ecf2d8215961ca7c539132b62a72df6072cc3e14'/>
<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
<entry>
<title>update the project for RT-Thread_V4.1.1</title>
<updated>2022-08-16T11:38:48Z</updated>
<author>
<name>liuxianliang</name>
<email>liuxianliang@rt-thread.com</email>
</author>
<published>2022-08-16T07:28:03Z</published>
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<id>urn:sha1:a4eb64b873a9b385ea2eb4d3ab43e9f642f484a6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp] Update all projects.</title>
<updated>2022-03-29T11:28:06Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-03-29T10:42:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e353b2d5f1cd6483af222a410d22dc48363de410'/>
<id>urn:sha1:e353b2d5f1cd6483af222a410d22dc48363de410</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722)</title>
<updated>2022-03-29T03:08:25Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-03-29T03:08:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f587a55bc2006f4316383425d518b734e42bb4a2'/>
<id>urn:sha1:f587a55bc2006f4316383425d518b734e42bb4a2</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align

* [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568</content>
</entry>
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