<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2026-09-21T01:36:49Z</updated>
<entry>
<title>feat[bsp][stm32][h7]: add UART4 RX DMA configuration</title>
<updated>2026-09-21T01:36:49Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-09-17T03:39:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=3ede09e45b94b92bd7fb7935d2d401ba4297b66e'/>
<id>urn:sha1:3ede09e45b94b92bd7fb7935d2d401ba4297b66e</id>
<content type='text'>
Add the missing UART4 RX DMA definitions for STM32H7.

UART4 RX DMA uses DMA1 Stream0 with the UART4 RX DMA request.
The configuration is enabled when BSP_UART4_RX_USING_DMA is selected.
</content>
</entry>
<entry>
<title>[bsp][stm32] Add SPI BDMA support and unify DMA/BDMA/GPDMA config</title>
<updated>2026-09-14T01:59:27Z</updated>
<author>
<name>moment-NEW</name>
<email>cghdudu@qq.com</email>
</author>
<published>2026-09-11T05:24:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ca73422bd66a9ba57850a297e232d111d2cd85a1'/>
<id>urn:sha1:ca73422bd66a9ba57850a297e232d111d2cd85a1</id>
<content type='text'>
- Unify DMA/BDMA/GPDMA descriptors in drv_dma (common fields + per-type union)
- Support BDMA in SPI driver with h7 dma/spi config header updates
- Add SPI6 TX/RX BDMA Kconfig options for H7
</content>
</entry>
<entry>
<title>[bsp][drives]fix(spi_config):修复H7的SPI6配置缺失问题 (#11633)</title>
<updated>2026-07-21T03:58:33Z</updated>
<author>
<name>Just Chen</name>
<email>cghdudu@qq.com</email>
</author>
<published>2026-07-21T03:58:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9657b3ce1070e1c83479f011bd09d84a922072f2'/>
<id>urn:sha1:9657b3ce1070e1c83479f011bd09d84a922072f2</id>
<content type='text'>
* [bsp][drives]fix(spi_config):修复H7的SPI6配置缺失问题

* style: format code with clang-format [skip ci]

* [bsp][stm32]refactor:(spi_config):去除尚不支持的DMA相关配置

* [bsp][stm32]refactor(spi_config):格式化SPI_CONFIG.H

---------

Co-authored-by: moment-NEW &lt;moment-NEW+github[bot]@noreply.github.com&gt;</content>
</entry>
<entry>
<title>feat[ADC]: 新增 ADC V2 驱动支持 (#11440)</title>
<updated>2026-07-07T00:59:22Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-07-07T00:59:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=937be2c97dc69f8dcdc804f56fdad7665547896d'/>
<id>urn:sha1:937be2c97dc69f8dcdc804f56fdad7665547896d</id>
<content type='text'>
* feat[ADC V2]: add ADC V2 driver support

add ADC V2 core APIs, session state management, and sequence read support
add STM32 ADC V2 HAL backend with internal-channel and VREF handling
add per-series STM32 ADC V2 default configuration headers
wire ADC V2 Kconfig and SConscript integration for components and STM32 BSP drivers
keep ADC V2 mutually exclusive with the legacy ADC driver path

* feat[ADC V2]: add ADC V2 MSH special channel read support

add generic ADC V2 MSH commands for probing, configuring, raw reads, voltage reads, and sequence reads
add STM32 ADC V2 backend special commands for VREFINT, temperature sensor, and VBAT reads
add STM32 helper APIs for special logical channels, sampling time, resolution, and temperature calculation
wire ADC V2 MSH sources through Kconfig and SConscript

* feat[ADC V2]: add ADC V2 stream DMA support

add ADC V2 stream APIs with latest-frame and FIFO buffering policies
wire STM32 ADC V2 to circular DMA stream mode with per-instance Kconfig options
extend STM32 ADC config headers and DMA helpers for stream DMA configuration
add FinSH stream commands for start, read, cancel, and stop operations
handle Cortex-M7 cache-safe DMA buffers for STM32 stream sampling

* feat[ADC V2]: add timer trigger support for ADC V2 streams

add ADC V2 trigger configuration, validation, and lifecycle coordination
add timer update trigger support through clock timer TRGO controls
map STM32 ADC V2 timer update triggers to HAL external trigger selector fields
add Kconfig, SConscript, and MSH entries for ADC trigger setup and inspection

* feat[ADCV2]: add timer and comparator trigger selectors

add ADC V2 timer compare and analog comparator trigger configuration support
extend clock timer trigger config with compare event and channel fields
wire STM32 ADC external trigger selector mappings for TIM update, TIM compare, and COMP output
add FinSH trigger_set commands and Kconfig switches for timer and comparator trigger backends

* fix[ADC V2]: resolve ADC V1 compatibility Kconfig loop

* ci[ADC V2][stm32]: add ADC v2 peripheral config for stm32f407-rt-spark BSP</content>
</entry>
<entry>
<title>refactor[STM32][DMA]: unify DMA config descriptors in HAL driver configs</title>
<updated>2026-05-06T07:30:39Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-05-05T01:06:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=1c377a21cc9a581d31e8371522e30092d01f227c'/>
<id>urn:sha1:1c377a21cc9a581d31e8371522e30092d01f227c</id>
<content type='text'>
- migrate STM32 HAL driver DMA config macros to shared descriptor init helpers
- add overridable DMA priority and NVIC priority fields for board-level configs
- align SPI, UART, I2C, SDIO, and QSPI DMA descriptors across visible STM32 series configs
- simplify per-series DMA config definitions and reduce duplicated field assignments
</content>
</entry>
<entry>
<title>feat[stm32][i2c]: Add H7 hard I2C config and I2C4 entries</title>
<updated>2026-03-15T05:02:23Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-03-14T08:14:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e10d364f4e201f648a999b1a38878d7f92496308'/>
<id>urn:sha1:e10d364f4e201f648a999b1a38878d7f92496308</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=743b614875fc33257be47ab53b6c5e040ec27893'/>
<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>[bsp] [stm32] 添加鹿小班STM32H723开发板的BSP (#10842)</title>
<updated>2025-11-07T09:01:51Z</updated>
<author>
<name>Pcb-yun</name>
<email>2909609346@qq.com</email>
</author>
<published>2025-11-07T09:01:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=96a125ca4181dd7f4d7821e3ab62d7ab5430fdff'/>
<id>urn:sha1:96a125ca4181dd7f4d7821e3ab62d7ab5430fdff</id>
<content type='text'>
* [bsp] [stm32] 添加鹿小班STM32H723开发板的BSP

* fix(bsp): 修正链接脚本中的拼写错误并启用环境变量配置

修复链接脚本中'excetion'拼写错误为'execution'
启用rtconfig.py中的环境变量配置选项

* fix(bsp): 重新添加开发板IAR、GCC链接脚本

链接脚本中包含了所有寄存器，除flash与主sarm外其余寄存器已注释

* refactor(bsp): 移除冗余的SOC_STM32H723ZGT6配置选项</content>
</entry>
<entry>
<title>[stm32][lptim]lptimer is register with hwtimer, only supports pm calls,the timer function is not supported</title>
<updated>2024-07-19T03:51:39Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2024-07-11T05:45:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=fccd98747ea68c38e1dcb4017e127a668c2e00ca'/>
<id>urn:sha1:fccd98747ea68c38e1dcb4017e127a668c2e00ca</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[stm32] split stm32 drivers as normal and nano drivers</title>
<updated>2023-12-03T13:25:00Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-12-02T17:32:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=860094e89366bd6f714728e2e9c3de7517a91720'/>
<id>urn:sha1:860094e89366bd6f714728e2e9c3de7517a91720</id>
<content type='text'>
- move all normal drivers (devices framework drivers) into drivers
  folder.
- create nano folder for nano drivers
  nano drivers are only for a simply wrap of the HAL function, and
  not seek for adopting rt-thread devcies framework.
- provide unified nano console and GPIO drivers.
</content>
</entry>
</feed>
