rt-thread.git/bsp/stm32/libraries/HAL_Drivers/drivers/drv_hard_i2c.c, branch masterUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/bsp/stm32/libraries/HAL_Drivers/drivers/drv_hard_i2c.c?h=master2026-06-15T07:03:25Zfix[STM32][I2C]: stabilize hard i2c async transfer routing2026-06-15T07:03:25Zwdfk-prog1425075683@qq.com2026-06-12T02:09:10Zurn:sha1:8fefb3a71c534ba294a689e84b204503d19c9c71
centralize hard I2C per-message route state for DMA, interrupt, and polling paths
make multi-message and no-stop transfers use sequential HAL APIs only
snapshot scheduler and interrupt context once for stable async transfer decisions
reuse the transaction timeout for async wait logging and abort recovery
fix[STM32][I2C]: stabilize async completion and recovery flow for hard i2c2026-05-12T05:36:58Zwdfk-prog1425075683@qq.com2026-05-07T05:36:48Zurn:sha1:ebd3dae49083ac70a1bafae2375f574050ebf3f3
enable I2C error irq when async transfer paths are used fall back to polling when scheduler or interrupt context cannot wait for completion complete the wait path on HAL error callback and abort the transfer on async timeout or error allow INT and DMA mode flags to coexist and keep recovery behavior aligned across STM32 I2C IPs
refactor[STM32][DMA]: add common DMA helper layer for HAL drivers2026-05-06T07:30:39Zwdfk-prog1425075683@qq.com2026-05-05T01:06:22Zurn:sha1:c45f5f926725d521db3a438117688c2011c0bed6
- add drv_dma common helpers and stm32_dma_config descriptors for STM32 series
- refactor i2c, spi, usart, qspi, and sdio DMA setup and deinit paths to reuse the common layer
- unify DMA IRQ enable, rollback handling, and const board-level DMA configuration usage
fix[STM32][I2C]: allow INT and DMA flags to coexist in hard i2c config2026-04-17T05:10:56Zwdfk-prog1425075683@qq.com2026-04-14T07:44:54Zurn:sha1:96c0ce2de4b8a8c74081cc1bdc36dddfbd6f1b16fix:[STM32][I2C]:DMA RX setting bug2026-04-13T09:52:38Zwdfk-prog1425075683@qq.com2026-04-13T03:44:23Zurn:sha1:fab59660abd0a72f47df7cfb21776581f45a8eb0feat:[STM32][I2C]:Distinguish STM32 I2C timing semantics by IP generation2026-04-13T09:52:38Zwdfk-prog1425075683@qq.com2026-04-13T03:43:53Zurn:sha1:141895ec822bbba200a56af099a83f7234ae8b7arefactor[stm32][i2c]: restructure transfer flow and error handling2026-04-07T03:47:11Zwdfk-prog1425075683@qq.com2026-03-16T02:23:04Zurn:sha1:0861ee1e513e40c3144aa44ad335acea015b2dddfeat[stm32][i2c]: support poll/int/dma transfer paths and i2c42026-04-07T03:47:11Zwdfk-prog1425075683@qq.com2026-03-14T07:08:57Zurn:sha1:41ea75839d17f3a198010f2007c17656cabafbbb[bsp][stm32] hardware i2c driver add support for STM32F1 series2024-12-13T22:46:07Zzzk59763964145+zzk597@users.noreply.github.com2024-12-13T22:46:07Zurn:sha1:02a114985a8cd10d69c757787ed174c6c3f0cb12[stm32] i2c hard driver fixup：增加硬件I2C传输超时等待时间2024-05-04T16:51:27ZSCZeiDan53632180+SCZeiDan@users.noreply.github.com2024-05-04T16:51:27Zurn:sha1:d78429eb8e3222d094ee8048e53c229117e18916
问题：
在使用硬件 I2C 驱动进行音频模块 WM8978 配置时，发现连续 rt_i2c_transfer 进行 I2C 传输时发现，连续多次调用 rt_i2c_transfer 会出现丢包现象；溯源发现是每次使用 rt_i2c_transfer 传输2字节，传输频率过高导致底层 HAL_I2C_Master_Seq_Transmit_DMA 报错 HAL_BUSY；
现象：
rt_completion_wait超时等待完成之后，I2C仍处于HAL_I2C_STATE_BUSY_TX状态，且后续第二次运行至HAL_I2C_Master_Seq_Transmit_DMA时会直接返回HAL_BUSY，从而直接 goto out; 退出而不会再次进行超时等待；
* drv_hard_i2c.c: 修复325行缺失'}'语法错误;更改HAL_I2C_xx_Transimt_xx调用中目标设备地址值;i2c_hard_config.h: 添加STM32F系列芯片xx_DMA_CONFIG宏定义;
* 回溯I2C设备地址传参处(msg->addr<<1)修改；
* fixup: 增加硬件I2C传输延时，解决连续传输导致HAL_BUSY状态；