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<title>rt-thread.git/bsp/ti/c28x/tms320f28379d, branch serialX-dev</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2023-01-13T03:47:23Z</updated>
<entry>
<title>modify RT_ALIGN_SIZE as 8 by default</title>
<updated>2023-01-13T03:47:23Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-01-12T04:25:57Z</published>
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<id>urn:sha1:ddccef3a64f1dc477134d4ff73117a653955a5eb</id>
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</content>
</entry>
<entry>
<title>format Kconfig and sconscript</title>
<updated>2023-01-09T03:52:13Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-01-09T02:14:23Z</published>
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<id>urn:sha1:9bc68d26a446158aad13f910fa5a2b8b09febec1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>c28x scons</title>
<updated>2022-11-15T03:19:27Z</updated>
<author>
<name>Yunjie Gu</name>
<email>yunjie.gu1@gmail.com</email>
</author>
<published>2022-11-11T21:59:49Z</published>
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<id>urn:sha1:9e152c117e8ad27d1e8ea3ed98b418c92913ac43</id>
<content type='text'>
</content>
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<entry>
<title>[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts.</title>
<updated>2022-10-20T03:41:13Z</updated>
<author>
<name>Yunjie Gu</name>
<email>yunjie.gu1@gmail.com</email>
</author>
<published>2022-10-20T03:41:13Z</published>
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<id>urn:sha1:8fa9fde43a2e9cb978b52c0eb536fe2bafcc6e73</id>
<content type='text'>
</content>
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<entry>
<title>[bsp][c28x] 新增adc驱动 (#6520)</title>
<updated>2022-10-15T04:56:00Z</updated>
<author>
<name>YuQi</name>
<email>qiyu_sjtu@163.com</email>
</author>
<published>2022-10-15T04:56:00Z</published>
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<content type='text'>
1. 在c28x文件目录上一层再套一层文件夹ti，目前28379的项目路径为rt-thread\bsp\ti\c28x\tms320f28379d
2. 新增adc驱动与kconfig配置</content>
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