rt-thread.git/bsp, branch copilot/add-undef-kconfig-allowlist

bsp: stm32f407-micu: add onboard spi flash support (#11065)

2025-12-22T01:58:56Z

* bsp: stm32f407-micu: add onboard spi flash support * bsp(stm32f407-micu): cleanup SConscript formatting and dead code

fix: resolve QSPI compilation error and add CI guard for stm32l475-atk-pandora

2025-12-17T02:05:35Z

- Fix function pointer type mismatch between drv_qspi.h and rt_qspi_device - Add qspi-flash.attach file for CI compilation guard - Optimize code with macros and inline adapter - Include all related bug fixes and configuration updates Fixes: #11036

[add] add gd32w553h-eval bsp

2025-12-15T07:23:01Z

[finsh][cmd] add 'console' command to config console

2025-12-15T04:51:30Z

Signed-off-by: GuEe-GUI <2991707448@qq.com>

[bsp][nxp][imx] Add FRDM-i.MX91 bsp #10570

2025-12-12T05:42:35Z

[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscv

2025-12-04T07:42:09Z

1.Add the necessary function declarations for SMP enablement and implement the corresponding functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable, rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock, rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority, rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler. 2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S, add a call to rt_cpus_lock_status_restore to update the scheduler information. 3.If the MMU is enabled, use the .percpu section and record different hartids by configuring special page tables; if the MMU is not enabled, record them directly in the satp register. Additionally, add dynamic startup based on core configuration.The .percpu section is only used when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space waste since no macro guard is added for it in the link script currently. 4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the original +256MB to +128MB. Modify the SConscript file under the common64 directory to include common/atomic_riscv.c in the compilation process. Signed-off-by: Mengchen Teng

[bsp][renesas] Add ra8p1-titan-board BSP.

2025-12-03T13:44:51Z

[bsp/renesas][drivers] Added adaptation for ra8p1.

2025-12-03T13:44:51Z

[bsp][stm32]:remove duplicated header includes for drv_stdio.h

2025-12-01T13:53:00Z

[bsp][spi flash]: 优化GD32F470 SPI Flash初始化和UART0配置 (#10983)

2025-12-01T06:47:53Z

* feat(gd32): 优化GD32F470 SPI Flash初始化和UART0配置主要修改： 1. SPI Flash初始化优化 - 添加可配置的SPI Flash自动初始化选项(BSP_USING_SPI_FLASH) - 支持按SPI总线独立配置Flash初始化(BSP_USING_SPIx_FLASH) - 避免SPI Flash初始化与其他SPI设备(如OLED、WIFI)冲突 - 添加SPI5 Flash支持 - 修改drv_spi_flash.c，仅在明确配置的SPI总线上初始化Flash 2. UART0配置修复 - 将UART0的AFIO默认值从AF1改为AF7 - 修复串口无响应问题这些修改使得用户可以更灵活地配置SPI Flash初始化，避免自动初始化导致的设备冲突问题。 * feat(gd32): 解耦SPI Flash与SFUD的依赖关系