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<title>rt-thread.git/components/drivers/block/blk.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/block/blk.c?h=master</id>
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<updated>2026-10-17T01:44:26Z</updated>
<entry>
<title>[ARCH/RISC-V] Next RISC-V (#10320)</title>
<updated>2026-10-17T01:44:26Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2026-10-17T01:44:26Z</published>
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<id>urn:sha1:8d8dc96b67eee53af2841a8819364d52fbec39cb</id>
<content type='text'>
* [libcpu][risc-v] Refactor the RISC-V architecture port

Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration.

- use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection
- unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling
- add PLIC, CLIC, ACLINT, APLIC and IMSIC support
- map physical hart IDs to contiguous logical CPU IDs
- add T-Head vendor overrides while preserving legacy ports
- migrate qemu-virt64-riscv with RV32 and RV64 support
- update clock_time, MM, LWP, OFW, PCI and Rust integration

Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [libcpu][risc-v] skip disabled CPU nodes in early FDT walk

Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child
without checking status, so disabled cores still joined hart registration
and MMU capability probing. Skip nodes that are not okay/ok via
rt_fdt_device_is_available() before reading reg or mmu-type.

Signed-off-by: seteiro &lt;chenmoushun@163.com&gt;

* [libcpu][risc-v] Fix per-CPU page table mapping

- reuse existing non-leaf page table entries when mapping per-CPU areas
- reject leaf entry conflicts instead of overwriting mappings

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
Signed-off-by: seteiro &lt;chenmoushun@163.com&gt;
Co-authored-by: seteiro &lt;chenmoushun@163.com&gt;</content>
</entry>
<entry>
<title>[device][mmcsd] Fix Arm Compiler 5 build compatibility #11690</title>
<updated>2026-09-07T03:18:41Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-09-07T03:18:41Z</published>
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<id>urn:sha1:280bcfeec362f2164140606860b22026e5031c3d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix(drivers/block): replace GNU ?: extension with standard C ternary in blk.c</title>
<updated>2026-02-22T05:04:31Z</updated>
<author>
<name>Shaun</name>
<email>rsj@php.vg</email>
</author>
<published>2026-02-21T05:16:52Z</published>
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<id>urn:sha1:040c0290554f8604fd0522748b09b0e2c5632002</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[DM/FIXUP] Fixup block value init</title>
<updated>2024-12-13T02:39:20Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-12-12T06:03:29Z</published>
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<id>urn:sha1:1c54ff4de60b06f3cce6a7328627330683b294be</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/FEATURE] Support simple block layer</title>
<updated>2024-11-20T08:11:10Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-10-30T02:44:16Z</published>
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<id>urn:sha1:c424cb8186950dcc0176ef9c584562cad674a636</id>
<content type='text'>
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
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