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<title>rt-thread.git/components/drivers/include, branch copilot/create-device-driver-model-docs</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/include?h=copilot%2Fcreate-device-driver-model-docs</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/include?h=copilot%2Fcreate-device-driver-model-docs'/>
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<updated>2025-12-26T13:04:42Z</updated>
<entry>
<title>[sdio][dm] update for DM (#11078)</title>
<updated>2025-12-26T13:04:42Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2025-12-26T13:04:42Z</published>
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<id>urn:sha1:c6498b5f65bc5f1cf7ad70f214fda56079890848</id>
<content type='text'>
* [sdio][dm] import Kconfig for DM

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [sdio] fixup IRQ and mmcsd threads' stack size default

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [sdio][dm] Support DM mode

1. Support features read by DM.
2. Support regulator API in drivers.
3. Support send tuning option CMD.
4. Replace `switch_uhs_voltage` by `signal_voltage_switch`.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [dm][sdhci] Cleanup the SDHCI

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [sdio][dm] add new SDIO/SDHCI drivers

1. SDHCI support on PCI bus
2. Synopsys DesignWare MMC Family(MMIO/PCI)

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title>[dm][include] fixup loss' header</title>
<updated>2025-12-22T05:24:41Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-22T04:58:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9370f81ad7dc90f1312e1ea527d8b0f01e682b5c'/>
<id>urn:sha1:9370f81ad7dc90f1312e1ea527d8b0f01e682b5c</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[dm][firmware][scmi] support ARM-SCMI interface #11069</title>
<updated>2025-12-19T13:20:17Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2025-12-19T13:20:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=43733268c1e22f65c67c796f9e3fe8908267aefd'/>
<id>urn:sha1:43733268c1e22f65c67c796f9e3fe8908267aefd</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[dm][power] add power reset and supply framework</title>
<updated>2025-12-17T02:29:05Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-15T04:20:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=b4d332706ee7b75e09b19d35c205f3dc2174d5bf'/>
<id>urn:sha1:b4d332706ee7b75e09b19d35c205f3dc2174d5bf</id>
<content type='text'>
1. Board level reset or poweroff
2. Power supply class

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[dm][scsi] Add parallel_io option for SCSI host</title>
<updated>2025-12-16T03:39:41Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-15T07:40:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e83a6e9baa12cb6230c9bb58938a989bb758bbb8'/>
<id>urn:sha1:e83a6e9baa12cb6230c9bb58938a989bb758bbb8</id>
<content type='text'>
Some SCSI supported parallel_io = RT_TRUE, like UFS.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[dm][core] add common machine power interface</title>
<updated>2025-12-16T03:35:35Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-12T17:21:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=491321140966e7acf8f9dd98a4536b4cc232b9f8'/>
<id>urn:sha1:491321140966e7acf8f9dd98a4536b4cc232b9f8</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[dm][graphic] support dm mode</title>
<updated>2025-12-15T08:54:23Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-12T07:58:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=5abecc1fd0c3ee9d71ce6b3ff3ee95eda4825065'/>
<id>urn:sha1:5abecc1fd0c3ee9d71ce6b3ff3ee95eda4825065</id>
<content type='text'>
1. Add backlight framework for graphic.
2. Add framebuffer and plane, power, EDID for graphic framework
3. Add boot logo render for graphic
4. Update lcd.h

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[dm][hwcache] support hwcache (#11049)</title>
<updated>2025-12-13T08:32:25Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2025-12-13T08:32:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=d8709ba9fb65bb444f0494c243b9a4dcc08f337c'/>
<id>urn:sha1:d8709ba9fb65bb444f0494c243b9a4dcc08f337c</id>
<content type='text'>
Some ARCH not has std cache ops, such as RISC-V

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title>[dm][clk] refactoring the CLK framework</title>
<updated>2025-12-12T05:33:28Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-09T09:32:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=335a1242b0d4bf1a0c82a71e1da3bb2e72bfeb84'/>
<id>urn:sha1:335a1242b0d4bf1a0c82a71e1da3bb2e72bfeb84</id>
<content type='text'>
The old CLK is can't link all hardware clock cell in system that the
API of layout such as 'set_parent' can't work as expected.

Some hareware clock cell need some flags to prevent some dangerous behaviors, eg:
When a clock cell is link to the PMU, the SoC will power-down if the cell is
disable.

The new CLK can do it, and make the CLK drivers implemented easier from
TRM/DataSheet.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[dm][hwspinlock] support hwspinlock</title>
<updated>2025-12-11T03:08:33Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-12-09T11:53:55Z</published>
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<id>urn:sha1:dd20176cbae0a4f5867829ce776e09245239d01c</id>
<content type='text'>
Hardware spinlock modules provide hardware assistance for
synchronization and mutual exclusion between heterogeneous processors
and those not operating under a single, shared operating system.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
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