rt-thread.git/components/drivers/ofw/io.c, branch v5.3.0-beta

[DM/OFW][PCI] Fix address translation and PCI resource enumeration (#11677)

2026-08-14T04:42:32Z

* [DM/OFW][PCI] Fix address translation and PCI resource enumeration Rework OFW address translation to walk nested bus ranges in the correct direction and cache "ranges" and "dma-ranges" independently. Handle PCI three-cell addresses without treating the PCI flags cell as part of the address, and fix CPU-to-DMA and DMA-to-CPU translation across nested buses. Fix PCI BAR sizing and assignment by disabling address decoding during probing, preserving BAR attribute bits, and programming 64-bit BARs correctly. Add device enable and disable helpers so resources and bus mastering are enabled before driver probe. Program bridge memory and prefetch windows while scanning downstream buses, correctly link child buses into the PCI bus hierarchy, and avoid unnecessary PCIe link retraining when the link is already active. Allow host bridges without a device-tree pci-domain property by allocating unique domains dynamically, while preserving explicit domain assignments. Fix MSI and MSI-X IRQ setup, rollback, vector addressing, and affinity selection. Add the Raspberry Pi PCI vendor ID for RP1 and other downstream devices. Signed-off-by: GuEe-GUI <2991707448@qq.com> * style: format code with clang-format * style: format complete changed files with clang-format * drivers: pci: address OFW review feedback * style: format PCI and OFW changes for current master --------- Signed-off-by: GuEe-GUI <2991707448@qq.com>

[drivers][ofw] Update OFW #11004

2025-12-11T03:05:47Z

Fixup fdt address reg and cells parse. Support only option name way for earlycon. Find the console device when using "stdout-path".

[FEATURE/OFW] add address reverse/translate for DMA/CPU's address

2024-09-13T21:33:29Z

DMA and CPU address view is different, we need to convert them: +--------+ +--------+ +---------+ +--------+ | | | | | | | | | CPUs | | DEV0 | | IOMMU <----+ | DEV1 | | | | | | | | | | +----+---+ +----+---+ +----+----+ | +----+---+ | | | | | 0x200000 | 0x1000 | 0x1000 | | 0x8000 | | | | | | +-------------+-----------+ +----------+ | | +--------v----------------------------------------------------+ | | | Address BUS | | | +-------------------------------------------------------------+ Signed-off-by: GuEe-GUI <2991707448@qq.com>

[OFW] io ranges use list to storage without ofw data (#8993)

2024-05-28T06:25:09Z

[OFW] io ranges use ptr array to storage without ofw data ofw data is private data for every ofw node that the drivers of ofw node will use item. replace the ranges supported to a ptr array. the ptr array size is config by `RT_USING_OFW_BUS_RANGES_NUMBER` Signed-off-by: GuEe-GUI <2991707448@qq.com>

[drivers][core] 完善设备模型 (#8384)

2024-01-09T15:10:42Z

Drivers: Support Open Firmware API and model of PIC

2023-07-05T08:45:16Z

We support OFW API to replace fdt old API, and add IRQ, IO, Platform-Bus, CPUs ... OFW node contorl. To support work with Device Tree or ACPI in drivers that use IRQ, we make a programmable interrupt controller driver's model. Signed-off-by: GuEe-GUI