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<title>rt-thread.git/components/drivers/pci/host/Kconfig, branch copilot/fix-format-string-injection</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pci/host/Kconfig?h=copilot%2Ffix-format-string-injection</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pci/host/Kconfig?h=copilot%2Ffix-format-string-injection'/>
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<updated>2025-08-25T03:12:02Z</updated>
<entry>
<title>[DM/PCI] Add SoC PCI Kconfig import</title>
<updated>2025-08-25T03:12:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-08-20T08:39:15Z</published>
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<id>urn:sha1:af2c8ae1745f2231f04f94b65d4c41bee6b393c7</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Add DesignWare PCIe RC/EP base drivers</title>
<updated>2024-11-28T01:46:58Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-11-27T03:29:48Z</published>
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<id>urn:sha1:88b8310d163c192ae2cfed4ca4b6260a027a889a</id>
<content type='text'>
Too many PCI controllers base on DesignWare PCIe.
This is a modules.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/Feature] Basic PCI/PCIe (Peripheral Component Interconnect Express) bus</title>
<updated>2024-09-06T21:45:03Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-05-30T09:47:56Z</published>
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<id>urn:sha1:2168ed8e7d408aeada3427ebbb90bb8996885668</id>
<content type='text'>
PCI/PCIe have better performance and more devices support, such as
NVMe, GPU, Powerful NIC (Like RDMA). PCI/PCIe can access control by
IOMMU that the virtualiztion and userspace driver will more safety.
PCI/PCIe device could hot plugging, no design modifications SoC required,
PCI/PCIe on Embedded SoC is popular now.
We make a simple framework to support them.

Feature Lists:
1.PCI INTx: the INT[A-D] pin IRQ for legacy PCI, work with platform PIC.
2.MSI/MSI-X: the message write IRQ for PCIe, work with platform's PIC.
3.PME: we only support the D0, D1, D2, D3HOT, D3COLD init by framework.
4.Endpoint: a simple EP framework for PCI FPGA or NTB function.
5.OFW: we only support work on OFW SoC, ACPI support in the future maybe.

Host controller:
1. Common PCI host controller on ECAM.
2. Generic PCI host controller on ECAM.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
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